From: Oleksij Rempel <o.rempel@pengutronix.de>
To: "A.s. Dong" <aisheng.dong@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Fabio Estevam <fabio.estevam@nxp.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
dl-linux-imx <linux-imx@nxp.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: arm: fsl: add mu binding doc
Date: Tue, 17 Jul 2018 08:31:45 +0200 [thread overview]
Message-ID: <739d382e-b553-107f-3cb7-59b7adf5d16d@pengutronix.de> (raw)
In-Reply-To: <AM0PR04MB42111EDD7771D0FABCEB671B805C0@AM0PR04MB4211.eurprd04.prod.outlook.com>
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On 17.07.2018 08:26, A.s. Dong wrote:
>> -----Original Message-----
>> From: Oleksij Rempel [mailto:o.rempel@pengutronix.de]
>> Sent: Tuesday, July 17, 2018 1:45 PM
>> To: A.s. Dong <aisheng.dong@nxp.com>; Shawn Guo
>> <shawnguo@kernel.org>; Fabio Estevam <fabio.estevam@nxp.com>; Rob
>> Herring <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>
>> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
>> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>
>> Subject: Re: [PATCH v3 1/3] dt-bindings: arm: fsl: add mu binding doc
>>
>>
>>
>> On 17.07.2018 07:00, A.s. Dong wrote:
>>>> -----Original Message-----
>>>> From: Oleksij Rempel [mailto:o.rempel@pengutronix.de]
>>>> Sent: Monday, July 16, 2018 7:42 PM
>>>> To: Shawn Guo <shawnguo@kernel.org>; Fabio Estevam
>>>> <fabio.estevam@nxp.com>; Rob Herring <robh+dt@kernel.org>; Mark
>>>> Rutland <mark.rutland@arm.com>; A.s. Dong <aisheng.dong@nxp.com>
>>>> Cc: Oleksij Rempel <o.rempel@pengutronix.de>; kernel@pengutronix.de;
>>>> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org;
>>>> dl-linux- imx <linux-imx@nxp.com>
>>>> Subject: [PATCH v3 1/3] dt-bindings: arm: fsl: add mu binding doc
>>>>
>>>> The Messaging Unit module enables two processors within the SoC to
>>>> communicate and coordinate by passing messages (e.g. data, status and
>>>> control) through the MU interface.
>>>>
>>>> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
>>>> ---
>>>> .../devicetree/bindings/mailbox/fsl,mu.txt | 32
>> +++++++++++++++++++
>>>> 1 file changed, 32 insertions(+)
>>>> create mode 100644
>>>> Documentation/devicetree/bindings/mailbox/fsl,mu.txt
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
>>>> b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
>>>> new file mode 100644
>>>> index 000000000000..5d48dd75b98d
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt
>>>> @@ -0,0 +1,32 @@
>>>> +NXP i.MX Messaging Unit (MU)
>>>> +--------------------------------------------------------------------
>>>> +
>>>> +Required properties:
>>>> +-------------------
>>>> +- compatible : should be "fsl,<chip>-mu", the supported chips
>> include:
>>>> + imx6sx - i.MX 6SoloX
>>>> + imx7d - i.MX 7Dual
>>>> + imx7s - i.MX 7Solo
>>>> + imx7ulp - i.MX 7ULP
>>>> + imx8qm - i.MX 8QM
>>>> + imx8qxp - i.MX 8QXP
>>>> +- reg : Should contain the registers location and length
>>>> +- interrupts : Interrupt number. The interrupt specifier format
>> depends
>>>> + on the interrupt controller parent.
>>>> +- #mbox-cells: Must be:
>>>> + 0 - for single channel mode. i.MX8* SCU protocol specific.
>>>> + 1 - for multichannel (generic) mode.
>>>> +
>>>> +Optional properties:
>>>> +-------------------
>>>> +- clocks : phandle to the input clock.
>>>> +- fsl,mu-side-a : Should be set for side A MU.
>>>
>>> For this property, how about doing like:
>>> fsl,mu-side: An Integer represents the MU side.
>>
>> All this SoCs have MUs with only two sides. Why do we need explicit
>> annotation for both parts?
>>
>>> If missing this property, it's default to Side A
>>
>> So, why do we need optional integer, which is set by default as side A?
>> This is why I made it bool.
>
> Yes, A bool probably is better.
>
>>
>>> which is mostly used by A core.
>>
>> And you will need to explicit set side=B for SCU. Correct?
>
> SCU is using side A. AFAIK all SoC A core is using side A by default.
> That's why I think it can be default one. User is free to specify both
> In device tree. Does it make sense to you?
Ok.
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next prev parent reply other threads:[~2018-07-17 6:31 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-16 11:42 [PATCH v3 0/3] add mailbox support for i.MX7D Oleksij Rempel
2018-07-16 11:42 ` [PATCH v3 1/3] dt-bindings: arm: fsl: add mu binding doc Oleksij Rempel
2018-07-16 15:16 ` Rob Herring
2018-07-17 4:51 ` A.s. Dong
2018-07-17 4:56 ` Oleksij Rempel
2018-07-18 3:16 ` A.s. Dong
2018-07-17 5:00 ` A.s. Dong
2018-07-17 5:45 ` Oleksij Rempel
2018-07-17 6:26 ` A.s. Dong
2018-07-17 6:31 ` Oleksij Rempel [this message]
2018-07-17 6:50 ` A.s. Dong
2018-07-17 7:52 ` Oleksij Rempel
2018-07-16 11:42 ` [PATCH v3 2/3] ARM: dts: imx7s: add i.MX7 messaging unit support Oleksij Rempel
2018-07-17 5:03 ` A.s. Dong
2018-07-16 11:42 ` [PATCH v3 3/3] mailbox: Add support for i.MX7D messaging unit Oleksij Rempel
2018-07-17 6:21 ` A.s. Dong
2018-07-17 6:42 ` Oleksij Rempel
2018-07-17 7:07 ` A.s. Dong
2018-07-17 7:13 ` Oleksij Rempel
2018-07-17 7:26 ` A.s. Dong
2018-07-17 7:49 ` Oleksij Rempel
2018-07-17 10:12 ` A.s. Dong
2018-07-17 5:05 ` [PATCH v3 0/3] add mailbox support for i.MX7D A.s. Dong
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