From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: Dinh Nguyen <dinguyen@kernel.org>
Cc: devicetree@vger.kernel.org, dinguyen@opensource.altera.com,
linux-arm-kernel@lists.infradead.org,
Graham Moore <grmoore@opensource.altera.com>
Subject: Re: [PATCH 08/12] ARM: dts: socfpga: Add NAND device tree for Arria10
Date: Thu, 05 Jan 2017 09:55:56 +0100 [thread overview]
Message-ID: <73a8b5ga1v.fsf@pengutronix.de> (raw)
In-Reply-To: <1483575694-29599-9-git-send-email-dinguyen@kernel.org>
Hi!
Dinh Nguyen <dinguyen@kernel.org> writes:
> From: Graham Moore <grmoore@opensource.altera.com>
>
> Add socfpga_arria10_socdk_nand.dts board file for supporting NAND.
>
> Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts | 44 ++++++++++++++++++++++++
> 2 files changed, 45 insertions(+)
> create mode 100644 arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts
>
(...)
> +#include "socfpga_arria10_socdk.dtsi"
> +
> +/ {
> + soc {
> + nand: nand@ffb90000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "okay";
> +
> + compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
> + reg = <0xffb90000 0x72000>, <0xffb80000 0x10000>;
> + reg-names = "nand_data", "denali_reg";
> + interrupts = <0 99 4>;
> + dma-mask = <0xffffffff>;
> + clocks = <&nand_clk>;
This belongs into the socfpga_arria10.dtsi.
Regards,
Steffen
--
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next prev parent reply other threads:[~2017-01-05 8:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-05 0:21 [PATCH 00/12] ARM: dts: socfpga: enable a few hardware bits Dinh Nguyen
[not found] ` <1483575694-29599-1-git-send-email-dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-01-05 0:21 ` [PATCH 01/12] ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits Dinh Nguyen
2017-01-05 0:21 ` [PATCH 02/12] ARM: dts: socfpga: set desired i2c clock on " Dinh Nguyen
2017-01-05 0:21 ` [PATCH 03/12] ARM: dts: socfpga: Add Rohm DH2228FV DAC Dinh Nguyen
2017-01-05 0:21 ` [PATCH 04/12] ARM: dts: socfpga: enable CAN on Cyclone5 devkit Dinh Nguyen
2017-01-05 0:21 ` [PATCH 05/12] ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10 Dinh Nguyen
2017-01-05 0:21 ` [PATCH 06/12] ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit Dinh Nguyen
2017-01-05 0:21 ` [PATCH 07/12] ARM: dts: socfpga: add fpga-manager node for Arria10 Dinh Nguyen
2017-01-05 0:21 ` [PATCH 08/12] ARM: dts: socfpga: Add NAND device tree " Dinh Nguyen
2017-01-05 8:55 ` Steffen Trumtrar [this message]
2017-01-05 11:42 ` Dinh Nguyen
2017-01-05 0:21 ` [PATCH 09/12] ARM: dts: socfpga: fpga manager data is 32 bits Dinh Nguyen
2017-01-05 0:21 ` [PATCH 10/12] ARM: dts: socfpga: add base fpga region and fpga bridges Dinh Nguyen
2017-01-05 16:28 ` Alan Tull
[not found] ` <CANk1AXSbqohp73xHpp7e9-37d61ZB-dRAPAFc2eQGRYUnvB+0w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-05 16:34 ` Alan Tull
2017-01-06 7:39 ` Dinh Nguyen
2017-01-05 0:21 ` [PATCH 11/12] ARM: dts: socfpga: add fpga region support on Arria10 Dinh Nguyen
2017-01-05 0:21 ` [PATCH 12/12] ARM: dts: socfpga: add missing compatible string for SDRAM controller Dinh Nguyen
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