From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Cc: "Serge Semin" <fancer.lancer@gmail.com>,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Alexey Malahov" <Alexey.Malahov@baikalelectronics.ru>,
"Paul Burton" <paulburton@kernel.org>,
"Ralf Baechle" <ralf@linux-mips.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Olof Johansson" <olof@lixom.net>,
"Rob Herring" <robh+dt@kernel.org>,
linux-mips@vger.kernel.org, devicetree@vger.kernel.org,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"David Lechner" <david@lechnology.com>,
"John Garry" <john.garry@huawei.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Jon Hunter" <jonathanh@nvidia.com>,
"Marek Behún" <marek.behun@nic.cz>,
"Sameer Pujar" <spujar@nvidia.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 11/14] bus: cdmm: Add MIPS R5 arch support
Date: Thu, 21 May 2020 18:44:47 +0300 [thread overview]
Message-ID: <73d43b13-c153-cfa0-dbfa-bd0a560a3754@cogentembedded.com> (raw)
In-Reply-To: <20200521125851.5upamjd7ldirj57a@mobilestation>
On 21.05.2020 15:58, Serge Semin wrote:
>>> CDMM may be available not only MIPS R2 architectures, but also in
>> ^ on -re, it's singular
>
> Thanks, Sergey. Got it. I'll fix it in the next revision.
>
>>> newer MIPS R5 chips. For instance our P5600 chip has one. Lets mark
> Probably also: ^ Let's
> Right?
Yes.
Thanks for replying. :-)
>
> -Sergey
>
>>> the CDMM bus being supported for that MIPS arch too.
>
>>>
>>> Co-developed-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
>>> Signed-off-by: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
>>> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
>>> Reviewed-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
>>> Cc: Paul Burton <paulburton@kernel.org>
>>> Cc: Ralf Baechle <ralf@linux-mips.org>
>>> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
>>> Cc: Arnd Bergmann <arnd@arndb.de>
>>> Cc: Olof Johansson <olof@lixom.net>
>>> Cc: Rob Herring <robh+dt@kernel.org>
>>> Cc: linux-mips@vger.kernel.org
>>> Cc: devicetree@vger.kernel.org
>> [...]
MBR, Sergei
next prev parent reply other threads:[~2020-05-21 15:45 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 0:34 [PATCH v3 00/14] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Serge Semin
2020-05-21 0:34 ` [PATCH v3 01/14] dt-bindings: power: Convert mti,mips-cpc to DT schema Serge Semin
2020-05-21 0:34 ` [PATCH v3 02/14] dt-bindings: bus: Add MIPS CDMM controller Serge Semin
2020-05-21 0:34 ` [PATCH v3 03/14] mips: Add MIPS Release 5 support Serge Semin
2020-05-21 0:34 ` [PATCH v3 04/14] mips: Add MIPS Warrior P5600 support Serge Semin
2020-05-21 0:34 ` [PATCH v3 05/14] mips: Fix cpu_has_mips64r1/2 activation for MIPS32 CPUs Serge Semin
2020-05-21 0:34 ` [PATCH v3 06/14] mips: Add CP0 Write Merge config support Serge Semin
2020-05-21 0:34 ` [PATCH v3 07/14] mips: Add CONFIG/CONFIG6/Cause reg fields macro Serge Semin
2020-05-21 0:34 ` [PATCH v3 08/14] mips: MAAR: Use more precise address mask Serge Semin
2020-05-21 7:11 ` Thomas Bogendoerfer
2020-05-21 0:34 ` [PATCH v3 09/14] mips: Add CPS_NS16550_WIDTH config Serge Semin
2020-05-21 0:34 ` [PATCH v3 10/14] mips: cdmm: Add mti,mips-cdmm dtb node support Serge Semin
2020-05-21 0:34 ` [PATCH v3 11/14] bus: cdmm: Add MIPS R5 arch support Serge Semin
2020-05-21 10:25 ` Sergei Shtylyov
2020-05-21 12:58 ` Serge Semin
2020-05-21 15:44 ` Sergei Shtylyov [this message]
2020-05-21 0:34 ` [PATCH v3 12/14] mips: Add udelay lpj numbers adjustment Serge Semin
2020-05-21 0:34 ` [PATCH v3 13/14] mips: csrc-r4k: Mark R4K timer as unstable if CPU freq changes Serge Semin
2020-05-21 0:34 ` [PATCH v3 14/14] mips: cevt-r4k: Update the r4k-clockevent frequency in sync with CPU Serge Semin
2020-05-21 0:42 ` [PATCH v3 00/14] mips: Prepare MIPS-arch code for Baikal-T1 SoC support Serge Semin
2020-05-21 7:14 ` Thomas Bogendoerfer
2020-05-21 7:30 ` Arnd Bergmann
2020-05-21 13:48 ` Serge Semin
2020-05-21 13:50 ` Serge Semin
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