devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Steffen Trumtrar <s.trumtrar@pengutronix.de>
To: Alan Tull <atull@opensource.altera.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Moritz Fischer <moritz.fischer@ettus.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org,
	Matthew Gerlach <mgerlach@altera.com>,
	Dinh Nguyen <dinguyen@opensource.altera.com>,
	delicious.quinoa@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v18 6/6] ARM: socfpga: fpga bridge driver support
Date: Fri, 23 Sep 2016 16:13:19 +0200	[thread overview]
Message-ID: <73ponug19k.fsf@unicorn.hi.pengutronix.de> (raw)
In-Reply-To: <20160712193645.9098-7-atull@opensource.altera.com>


Hi!

Alan Tull writes:

> Supports Altera SOCFPGA bridges:
>  * fpga2sdram
>  * fpga2hps
>  * hps2fpga
>  * lwhps2fpga
>
> Allows enabling/disabling the bridges through the FPGA
> Bridge Framework API functions.
>
> The fpga2sdram driver only supports enabling and disabling
> of the ports that been configured early on.  This is due to
> a hardware limitation where the read, write, and command
> ports on the fpga2sdram bridge can only be reconfigured
> while there are no transactions to the sdram, i.e. when
> running out of OCRAM before the kernel boots.
>
> Device tree property 'init-val' configures the driver to
> enable or disable the bridge during probe.  If the property
> does not exist, the driver will leave the bridge in its
> current state.
>
> Signed-off-by: Alan Tull <atull@opensource.altera.com>
> Signed-off-by: Matthew Gerlach <mgerlach@altera.com>
> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

(...)

> +static inline int _alt_fpga2sdram_enable_set(struct alt_fpga2sdram_data *priv,
> +					     bool enable)
> +{
> +	return regmap_update_bits(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST,
> +				  priv->mask, enable ? priv->mask : 0);
> +}

(...)

> +	/* Get f2s bridge configuration saved in handoff register */
> +	regmap_read(sysmgr, SYSMGR_ISWGRP_HANDOFF3, &priv->mask);
> +

Could you maybe add some documentation about this implicit information
shared between a bootloader and this driver?
I understand why you do this, but there must be a better way than
depending on something some bootloader wrote in some undocumented
register, no?
The documentation just says:

"These registers are used to store handoff infomation between the
preloader and the OS. These 8 registers can be used to store any
information. The contents of these registers have no impact on the
state of the HPS hardware"

If it is already agreed upon, that a bridge-enable property is okay,
why not add a port-enable property, too?

Regards,
Steffen Trumtrar

-- 
Pengutronix e.K.                           | Steffen Trumtrar            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

  parent reply	other threads:[~2016-09-23 14:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-12 19:36 [PATCH v18 0/6] Device Tree support for FPGA Programming Alan Tull
2016-07-12 19:36 ` [PATCH v18 1/6] fpga: add bindings document for fpga region Alan Tull
2016-07-21 19:39   ` Rob Herring
2016-07-12 19:36 ` [PATCH v18 2/6] ARM: socfpga: add bindings document for fpga bridge drivers Alan Tull
     [not found]   ` <20160712193645.9098-3-atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
2016-08-01 16:18     ` Rob Herring
2016-08-03 18:44       ` atull
2016-07-12 19:36 ` [PATCH v18 3/6] add sysfs document for fpga bridge class Alan Tull
2016-07-12 19:36 ` [PATCH v18 4/6] fpga: add fpga bridge framework Alan Tull
2016-07-14 20:54   ` Paul Gortmaker
     [not found]     ` <CAP=VYLpxK7qt25pmC2byYRm1zVbVrkf2f1+xctoSTSAy+n9QdA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-07-15 16:58       ` Alan Tull
2016-07-12 19:36 ` [PATCH v18 5/6] fpga: fpga-region: device tree control for FPGA Alan Tull
2016-07-12 19:36 ` [PATCH v18 6/6] ARM: socfpga: fpga bridge driver support Alan Tull
2016-07-14 20:47   ` Paul Gortmaker
2016-08-08 19:18     ` atull
2016-08-08 20:44       ` Moritz Fischer
2016-08-09 16:00         ` Paul Gortmaker
2016-09-22 19:53           ` atull
2016-09-23 14:13   ` Steffen Trumtrar [this message]
2016-07-12 19:43 ` [PATCH v18 0/6] Device Tree support for FPGA Programming atull

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=73ponug19k.fsf@unicorn.hi.pengutronix.de \
    --to=s.trumtrar@pengutronix.de \
    --cc=atull@opensource.altera.com \
    --cc=delicious.quinoa@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dinguyen@opensource.altera.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mgerlach@altera.com \
    --cc=moritz.fischer@ettus.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).