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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b723f6e2597sm192129366b.45.2025.11.04.03.50.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Nov 2025 03:50:54 -0800 (PST) Message-ID: <740b9e7c-59bc-4a35-a268-526d92db372c@oss.qualcomm.com> Date: Tue, 4 Nov 2025 12:50:51 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] power: reset: qcom-pon: Add support for WARM reset To: Loic Poulain , andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, sre@kernel.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org References: <20251103182006.1158383-1-loic.poulain@oss.qualcomm.com> <20251103182006.1158383-3-loic.poulain@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251103182006.1158383-3-loic.poulain@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: 3kRwVtgrDIMM34260hdeLxRKI72RX8gm X-Proofpoint-GUID: 3kRwVtgrDIMM34260hdeLxRKI72RX8gm X-Authority-Analysis: v=2.4 cv=b7O/I9Gx c=1 sm=1 tr=0 ts=6909e89f cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=bj_OeWTxAPJtTrmVhqgA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA0MDA5NyBTYWx0ZWRfX/Ct1Px3lbmsH YLjHRIx4SlM7LJmVOem+MjmVREv87v7j2u2E/Mc3hOoj7f7WfZKtnpi1ZebxhtJOAYmVCGw/eQ0 3IfkkOw334hfO1qGPsoajP3w9sy4o77nw6hxfBH+6Ua+6FGH0BrkqIfOrZD5gvHzELQOthfg296 lrag01IBAg+8Jq6nkC6scSQvbTIPW2N5MhPpVcFoDCKRf7YLbpsuu5xOvJNLosFIBBF7FLxOAHx iRrGyKNIn4Y5X4UZuW7A7PPurpOS0E6luhlIrQYATyZ1PurwQMoHM4dFhopsjxqp8/pRg+F6DqQ MwO9XAKzdwV94UPUotP2vIf8LICgZBhD6llq6DooEC9Rgx/Mz4WXwwjqsflyh6wK/FTJDapoxNm OASAsV/GGS00al7cern97LCdEXT1JQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-03_06,2025-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 phishscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511040097 On 11/3/25 7:20 PM, Loic Poulain wrote: > This mechanism can be used when firmware lacks proper warm-reset handling, > for example, when the PSCI SYSTEM_RESET2 function is not implemented. > It enables the warm reset functionality via the PMIC. > > This fallback is only enabled if qcom,warm-reset property is present. > > Signed-off-by: Loic Poulain > --- > drivers/power/reset/qcom-pon.c | 47 ++++++++++++++++++++++++++++++++++ > 1 file changed, 47 insertions(+) > > diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c > index 7e108982a582..684e9fe9987d 100644 > --- a/drivers/power/reset/qcom-pon.c > +++ b/drivers/power/reset/qcom-pon.c > @@ -19,12 +19,20 @@ > > #define NO_REASON_SHIFT 0 > > +#define PON_SW_RESET_S2_CTL 0x62 > +#define PON_SW_RESET_S2_CTL_WARM_RST 0x01 > +#define PON_SW_RESET_S2_CTL2 0x63 > +#define PON_SW_RESET_S2_CTL2_RST_EN BIT(7) > +#define PON_SW_RESET_GO 0x64 > +#define PON_SW_RESET_GO_MAGIC 0xa5 Going back to msm8974 where the SPMI arbiter first showed up, these values are all seemingly valid, so I think we can drop the dt property. The restart reasons are set in stone too, and you can find more of them in the register description. That said, we're circumventing PS_HOLD this way - is that intended? And do we need to take any special care where there's more than one PMIC onboard to make sure that the SoC gets properly reset? Konrad