From: Rustam Adilov <adilov@disroot.org>
To: sashiko-reviews@lists.linux.dev
Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
robh@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,
neil.armstrong@linaro.org, olteanv@gmail.com
Subject: Re: [PATCH v9 4/6] phy: realtek: usb2: introduce reset controller struct
Date: Fri, 16 Oct 2026 18:31:42 +0000 [thread overview]
Message-ID: <742854ba3f87aee86ea78e3f39f9682d@disroot.org> (raw)
In-Reply-To: <sashiko-outbox-174759@kernel.org>
On 2026-10-16 18:15, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [High] phy: realtek: register access before reset deassertion causes hang/timeout
> - [Medium] phy: missing reset_control_assert in rtk_phy_exit and error paths
> --
>
> commit ae1074cfd8fee3a5506c0c9db06f187c80793713
> Author: Rustam Adilov <adilov@disroot.org>
>
> phy: realtek: usb2: introduce reset controller struct
>
> In RTL9607C, there is so called "IP Enable Controller" which resemble
> reset controller with reset lines and is used for various things like
> USB, PCIE, GMAC and such.
>
>> phy: realtek: usb2: introduce reset controller struct
>>
>> In RTL9607C, there is so called "IP Enable Controller" which resemble
>> reset controller with reset lines and is used for various things like
>> USB, PCIE, GMAC and such.
>>
>> Introduce the reset_control struct to this driver to handle deasserting
>> usb2 phy reset line.
>>
>> Make use of the function devm_reset_control_get_optional_exclusive()
>> function to get the reset controller and since existing RTD SoCs don't
>> specify the resets we can have a cleaner code.
>>
>> Since the vendor usb driver developed by Realtek doesn't assert the reset
>> line (or in their case clear the register bit), we can reasonably assume
>> reset_control_assert is not needed here.
>
> [Severity: Medium]
> Since this is an exclusive reset control, does it need to be asserted on
> teardown even if the vendor driver doesn't do it?
>
> If the reset line is never asserted during module removal or driver unbind
> (such as in an rtk_phy_exit() function), could this lead to power leakage
> or unexpected initial states during subsequent driver reloads?
There is still a lot unknown about the IP enable controller and what it really
does, the reset controller is just my best guess. I would ideally not deviate
from what the vendor usb driver did.
>> diff --git a/drivers/phy/realtek/phy-rtk-usb2.c b/drivers/phy/realtek/phy-rtk-usb2.c
>> index 5e483c853f02f..2ddad7be73534 100644
>> --- a/drivers/phy/realtek/phy-rtk-usb2.c
>> +++ b/drivers/phy/realtek/phy-rtk-usb2.c
> [ ... ]
>> @@ -676,6 +678,15 @@ static int rtk_phy_init(struct phy *phy)
>> if (!rtk_phy)
>> return -EINVAL;
>>
>> + if (rtk_phy->phy_rst) {
>> + ret = reset_control_deassert(rtk_phy->phy_rst);
>> +
>> + if (ret)
>> + return ret;
>> +
>> + usleep_range(5000, 6000);
>> + }
>> +
>> for (i = 0; i < rtk_phy->num_phy; i++)
>> ret = do_rtk_phy_init(rtk_phy, i);
>
> [Severity: Medium]
> If do_rtk_phy_init() fails, the reset line remains deasserted on the error
> path. Should the reset line be asserted before returning the error?
>
> [ ... ]
>> @@ -1055,6 +1066,11 @@ static int rtk_usb2phy_probe(struct platform_device *pdev)
>>
>> rtk_phy->num_phy = phy_cfg->num_phy;
>>
>> + rtk_phy->phy_rst = devm_reset_control_get_optional_exclusive(dev, NULL);
>> + if (IS_ERR(rtk_phy->phy_rst))
>> + return dev_err_probe(dev, PTR_ERR(rtk_phy->phy_rst),
>> + "usb2 phy reset is not working\n");
>> +
>> ret = parse_phy_data(rtk_phy);
>
> [Severity: High]
> Can calling parse_phy_data() here before deasserting the reset control cause
> a hardware hang or timeout?
>
> Inside parse_phy_data(), if the SoC configuration lacks a pre-populated
> default value for certain registers, functions like update_hs_clk_select()
> and update_dc_driving_level() will attempt to read from the PHY registers:
>
> drivers/phy/realtek/phy-rtk-usb2.c:update_hs_clk_select() {
> if (phy_parameter->inverse_hstx_sync_clock) {
> if (!phy_cfg->page0[6].addr) {
> rtk_phy_set_page(phy_reg, 0);
> phy_cfg->page0[6].addr = PAGE0_0XE6;
> phy_cfg->page0[6].data = rtk_phy_read(phy_reg, PAGE0_0XE6);
> }
> }
> }
>
> If the realtek,inverse-hstx-sync-clock DT property is set, it will read
> from the unclocked or reset IP block, which could lock up the system bus
> on many SoCs.
realtek,inverse-hstx-sync-clock property is irrelevant to rtl9607c.
next prev parent reply other threads:[~2026-10-16 18:31 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 18:03 [PATCH v9 0/6] phy: realtek: usb2: support for RTL9607C USB2 PHY Rustam Adilov
2026-10-16 18:03 ` [PATCH v9 1/6] phy: realtek: usb2: introduce phy_reg_desc struct to the driver Rustam Adilov
2026-10-16 18:15 ` sashiko-bot
2026-10-16 18:35 ` Rustam Adilov
2026-10-16 18:03 ` [PATCH v9 2/6] phy: realtek: usb2: introduce read and write functions to phy_reg_desc struct Rustam Adilov
2026-10-16 18:15 ` sashiko-bot
2026-10-16 18:03 ` [PATCH v9 3/6] dt-bindings: phy: realtek,usb2phy: extend for resets and RTL9607C support Rustam Adilov
2026-10-16 18:03 ` [PATCH v9 4/6] phy: realtek: usb2: introduce reset controller struct Rustam Adilov
2026-10-16 18:15 ` sashiko-bot
2026-10-16 18:31 ` Rustam Adilov [this message]
2026-10-16 18:03 ` [PATCH v9 5/6] phy: realtek: usb2: add support for RTL9607C USB2 PHY Rustam Adilov
2026-10-16 18:17 ` sashiko-bot
2026-10-16 18:03 ` [PATCH v9 6/6] phy: realtek: Make configs available for MACH_REALTEK_RTL Rustam Adilov
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