Re: [PATCH v2 0/2] dt-bindings: sifive: fix dt-schema errors

[<Conor.Dooley@microchip.com>]

On 15/08/2022 17:28, Atul Khare wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Conor,
> 
> Thanks -- really appreciate the help. Dell had to come out twice to
> fix my laptop, and it's finally done (hopefully), but moving back and
> forth between  the different distros has been really disruptive.

Ye, no worries. Not sure if you saw or Palmer told you - but I
resubmitted the GPIO patch & a revised version of the interrupts,
so that all made it into v6.0-rc1 :) FWIW they are:
5cef38dd03f3 dt-bindings: gpio: sifive: add gpio-line-names
b60cf8e59e61 dt-bindings: riscv: fix SiFive l2-cache's cache-sets

I assume it ended up in your inbox but you weren't actually set
up to reply properly.

Thanks,
Conor.

> 
> 
> On Tue, Jul 26, 2022 at 9:42 AM <Conor.Dooley@microchip.com> wrote:
>>
>> On 01/07/2022 21:00, Conor Dooley wrote:
>>> On 01/07/2022 20:49, Atul Khare wrote:
>>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>>
>>>> Conor,
>>>>
>>>> Apologies for the delay, but my laptop died a couple of weeks ago, and
>>>> I have been scrambling to get things up and running on the
>>>> replacement. I will try and get back to it ASAP.
>>>
>>> Nothing you can do about your laptop dying :)
>>>
>>>
>>
>> Hey Atul,
>> Been another couple weeks so I am going to send a v3 of these
>> patches (although without any changes to the v2) and we can
>> resume discussion about the cache binding change there.
>> Thanks,
>> Conor.