From: Lucas Stach <l.stach@pengutronix.de>
To: Benjamin Gaignard <benjamin.gaignard@collabora.com>,
Shawn Guo <shawnguo@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Adam Ford <aford173@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
Marek Vasut <marex@denx.de>, Tim Harvey <tharvey@gateworks.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kernel@pengutronix.de, patchwork-lst@pengutronix.de
Subject: Re: [PATCH v4 10/18] soc: imx: add i.MX8M blk-ctrl driver
Date: Sat, 02 Oct 2021 03:07:31 +0200 [thread overview]
Message-ID: <763dff4c948a5c435dc4d51224e825071c0a3cd6.camel@pengutronix.de> (raw)
In-Reply-To: <5b5609e9-cbba-79be-218c-0dd508e26ecf@collabora.com>
Hi Benjamin,
Am Dienstag, dem 14.09.2021 um 17:46 +0200 schrieb Benjamin Gaignard:
> Le 10/09/2021 à 22:26, Lucas Stach a écrit :
> > This adds a driver for the blk-ctrl blocks found in the i.MX8M* line of
> > SoCs. The blk-ctrl is a top-level peripheral located in the various *MIX
> > power domains and interacts with the GPC power controller to provide the
> > peripherals in the power domain access to the NoC and ensures that those
> > peripherals are properly reset when their respective power domain is
> > brought back to life.
> >
> > Software needs to do different things to make the bus handshake happen
> > after the GPC *MIX domain is powered up and before it is powered down.
> > As the requirements are quite different between the various blk-ctrls
> > there is a callback function provided to hook in the proper sequence.
> >
> > The peripheral domains are quite uniform, they handle the soft clock
> > enables and resets in the blk-ctrl address space and sequencing with the
> > upstream GPC power domains.
>
> Hi Lucas,
>
> I have tried to use your patches for IMX8MQ but it seems that the hardware
> have different architecture.
> On IMX8MQ there is only one VPU domain for G1 and G2 and that doesn't match
> with your implementation where it is needed to have "bus" and devices power domain.
> From what I experiment in current IMX8MQ implementation of blk-ctrl (inside VPU driver)
> enabling the 3 clocks (bus, G1, G2) is needed to reset the VPUs.
>
> Do you think you can update your design to take care of these hardware variations ?
The clocking/reset of the blk-ctrl and ADB in the i.MX8MQ VPU power
domain is really a bit strange, as the ADB reset is tied to the VPU
resets and the clk-ctrl seem to require all 3 VPU clocks, instead of
only the bus clock as in newer designs. However I was able to make it
work with the existing blk-ctrl driver design.
My current WIP patches (only tested with the G1 core so far) on top of
the v5 of the series I just sent out can be found here:
https://git.pengutronix.de/cgit/lst/linux/log/?h=imx8mq-vpu-blk-ctrl
Hope this helps.
Regards,
Lucas
next prev parent reply other threads:[~2021-10-02 1:07 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-10 20:26 [PATCH v4 00/18] i.MX8MM GPC improvements and BLK_CTRL driver Lucas Stach
2021-09-10 20:26 ` [PATCH v4 01/18] Revert "soc: imx: gpcv2: move reset assert after requesting domain power up" Lucas Stach
2021-09-10 20:26 ` [PATCH v4 02/18] soc: imx: gpcv2: Turn domain->pgc into bitfield Lucas Stach
2021-09-10 20:26 ` [PATCH v4 03/18] soc: imx: gpcv2: Set both GPC_PGC_nCTRL(GPU_2D|GPU_3D) for MX8MM GPU domain Lucas Stach
2021-09-10 20:26 ` [PATCH v4 04/18] soc: imx: gpcv2: add lockdep annotation Lucas Stach
2021-09-10 20:26 ` [PATCH v4 05/18] soc: imx: gpcv2: add domain option to keep domain clocks enabled Lucas Stach
2021-09-10 20:26 ` [PATCH v4 06/18] soc: imx: gpcv2: keep i.MX8M* bus " Lucas Stach
2021-09-10 20:26 ` [PATCH v4 07/18] soc: imx: gpcv2: support system suspend/resume Lucas Stach
2021-09-10 20:26 ` [PATCH v4 08/18] dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl Lucas Stach
2021-09-16 20:23 ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 09/18] dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains Lucas Stach
2021-09-16 20:25 ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 10/18] soc: imx: add i.MX8M blk-ctrl driver Lucas Stach
2021-09-14 15:46 ` Benjamin Gaignard
2021-10-02 1:07 ` Lucas Stach [this message]
2021-10-04 14:27 ` Benjamin Gaignard
2021-10-05 10:03 ` Lucas Stach
2021-10-05 12:36 ` Benjamin Gaignard
2021-10-13 12:12 ` Benjamin Gaignard
2021-11-07 21:08 ` Adam Ford
2021-11-08 8:35 ` Lucas Stach
2021-11-08 13:13 ` Adam Ford
2021-09-10 20:26 ` [PATCH v4 11/18] dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl Lucas Stach
2021-09-16 20:28 ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 12/18] dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains Lucas Stach
2021-09-16 20:29 ` Rob Herring
2021-09-10 20:26 ` [PATCH v4 13/18] soc: imx: imx8m-blk-ctrl: add DISP blk-ctrl Lucas Stach
2021-09-12 14:40 ` Adam Ford
2021-09-10 20:26 ` [PATCH v4 14/18] arm64: dts: imx8mm: add GPC node Lucas Stach
2021-10-01 23:07 ` Tim Harvey
2021-10-01 23:20 ` Lucas Stach
2021-10-02 0:06 ` Tim Harvey
2021-10-02 0:15 ` Tim Harvey
2021-10-02 0:25 ` Lucas Stach
2021-10-02 2:43 ` Tim Harvey
2021-10-02 12:51 ` Lucas Stach
2021-10-03 17:17 ` Tim Harvey
2021-10-03 19:44 ` Lucas Stach
2021-10-03 21:21 ` Tim Harvey
2021-10-04 7:44 ` Lucas Stach
2021-10-04 7:47 ` Lucas Stach
2021-09-10 20:26 ` [PATCH v4 15/18] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2021-09-10 20:26 ` [PATCH v4 16/18] arm64: dts: imx8mm: Add GPU nodes for 2D and 3D core Lucas Stach
2021-09-10 20:26 ` [PATCH v4 17/18] arm64: dts: imx8mm: add VPU blk-ctrl Lucas Stach
2021-09-10 20:26 ` [PATCH v4 18/18] arm64: dts: imx8mm: add DISP blk-ctrl Lucas Stach
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