From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B612ECAAA1 for ; Tue, 30 Aug 2022 16:47:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230092AbiH3Qri convert rfc822-to-8bit (ORCPT ); Tue, 30 Aug 2022 12:47:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230112AbiH3Qrc (ORCPT ); Tue, 30 Aug 2022 12:47:32 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04ABAB940A for ; Tue, 30 Aug 2022 09:47:28 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oT4OE-0002uf-Oo; Tue, 30 Aug 2022 18:47:02 +0200 Received: from [2a0a:edc0:0:900:1d::4e] (helo=lupine) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1oT4OC-002uB6-DY; Tue, 30 Aug 2022 18:47:00 +0200 Received: from pza by lupine with local (Exim 4.94.2) (envelope-from ) id 1oT4OB-000CLM-OY; Tue, 30 Aug 2022 18:46:59 +0200 Message-ID: <764e978ac77d63c6bb9e4338b633123a03cfda53.camel@pengutronix.de> Subject: Re: [PATCH 1/3] reset: microchip-sparx5: issue a reset on startup From: Philipp Zabel To: Michael Walle , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Horatiu Vultur Cc: UNGLinuxDriver@microchip.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Date: Tue, 30 Aug 2022 18:46:59 +0200 In-Reply-To: <20220826115607.1148489-2-michael@walle.cc> References: <20220826115607.1148489-1-michael@walle.cc> <20220826115607.1148489-2-michael@walle.cc> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.38.3-1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fr, 2022-08-26 at 13:56 +0200, Michael Walle wrote: > Originally this was used in by the switch core driver to issue a reset. > But it turns out, this isn't just a switch core reset but instead it > will reset almost the complete SoC. > > Instead of adding almost all devices of the SoC a shared reset line, > issue the reset once early on startup. Keep the reset controller for > backwards compatibility, but make the actual reset a noop. > > Suggested-by: Philipp Zabel > Signed-off-by: Michael Walle I've applied this patch to the reset/fixes branch. regards Philipp