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[109.252.193.52]) by smtp.googlemail.com with ESMTPSA id a1sm191289ljb.76.2021.03.18.03.44.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Mar 2021 03:44:50 -0700 (PDT) Subject: Re: [PATCH v5 2/7] clk: tegra: Fix refcounting of gate clocks To: =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= Cc: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Rob Herring , linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20210317193006.29633-1-digetx@gmail.com> <20210317193006.29633-3-digetx@gmail.com> <20210318091219.GA18038@qmqm.qmqm.pl> From: Dmitry Osipenko Message-ID: <768dcbd3-a29b-33c1-2147-e59e3847e75c@gmail.com> Date: Thu, 18 Mar 2021 13:44:49 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210318091219.GA18038@qmqm.qmqm.pl> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 18.03.2021 12:12, Michał Mirosław пишет: > On Wed, Mar 17, 2021 at 10:30:01PM +0300, Dmitry Osipenko wrote: >> The refcounting of the gate clocks has a bug causing the enable_refcnt >> to underflow when unused clocks are disabled. This happens because clk >> provider erroneously bumps the refcount if clock is enabled at a boot >> time, which it shouldn't be doing, and it does this only for the gate >> clocks, while peripheral clocks are using the same gate ops and the >> peripheral clocks are missing the initial bump. Hence the refcount of >> the peripheral clocks is 0 when unused clocks are disabled and then the >> counter is decremented further by the gate ops, causing the integer >> underflow. > [...] >> diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c >> index 4b31beefc9fc..3c4259fec82e 100644 >> --- a/drivers/clk/tegra/clk-periph-gate.c >> +++ b/drivers/clk/tegra/clk-periph-gate.c > [...] >> @@ -91,21 +108,28 @@ static void clk_periph_disable(struct clk_hw *hw) >> >> spin_lock_irqsave(&periph_ref_lock, flags); >> >> - gate->enable_refcnt[gate->clk_num]--; >> - if (gate->enable_refcnt[gate->clk_num] > 0) { >> - spin_unlock_irqrestore(&periph_ref_lock, flags); >> - return; >> - } >> + WARN_ON(!gate->enable_refcnt[gate->clk_num]); >> + >> + if (gate->enable_refcnt[gate->clk_num]-- == 1) >> + clk_periph_disable_locked(hw); > > Nit: "if (--n == 0)" seems more natural, as you want to call > clk_periph_disable_locked() when the refcount goes down to 0. > > [...] >> /* >> - * If peripheral is in the APB bus then read the APB bus to >> - * flush the write operation in apb bus. This will avoid the >> - * peripheral access after disabling clock >> + * Some clocks are duplicated and some of them are marked as critical, >> + * like fuse and fuse_burn for example, thus the enable_refcnt will >> + * be non-zero here id the "unused" duplicate is disabled by CCF. > > s/id/if/ ? I'll update this patch over the weekend, thanks!