From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA4C61C6B5; Wed, 21 Aug 2024 06:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724221377; cv=none; b=daZkagTNw63+do7ew4187ZMKAUgstYwBZCAA5BtMpnZycTN6d+Om0TWpK26DsijQhh/qhMYnboJjdCRGDqiE762KkH/fSM53Npc0rs9bXz7gGGwhH0u05U+T+NMKNI/ax+Oh+hOiBI6Hve7Wav3fOYLHl0cm6rmSvU3x+gD+QsY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724221377; c=relaxed/simple; bh=+Ca8p2IGyH6nc2ZHR6+G2NHhd+A2edfA9Q+GWa4Bv4E=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=WF/9q9T+O8ss2TU5WsyI6IHw89ZnztdfQZzeONVFMaLjC3z8ueixPQDNNfP7geQh69N6HsU9i+qNvOefmkbHpnVo1gQNS9g4TujAZnPHCO8guEcwaZTMeX2ht29Q6m+rg++Je6NpwTg7VDMfJIk21W4lrrOQS5hUGaCBztXq0Mo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Qej8SjUZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Qej8SjUZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C54EC32782; Wed, 21 Aug 2024 06:22:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1724221376; bh=+Ca8p2IGyH6nc2ZHR6+G2NHhd+A2edfA9Q+GWa4Bv4E=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Qej8SjUZathbahQzP/xGKitWxeX3KJi2+E1amapV5Zflc3EGm/HNTGOxaETr9FK+W kvNB+fQcmP1A/ic5Uj42q4Lxs15UFxA6FI0F6t61zi/OxGfQ+dcI8cywB500VrWn9Z LQMIgPObfn4TGjWlr93WI7haAfyRN7so44dIBvmz83GB/6Xu1a0B5Q/3GgqVcphMuA sjHMs+gIMAoLlXq++9fspZy5Wz6LHnyQFcjTpdPuYUdXvnYAIgCgCqpH8BjuIIsKPD zmiyGs017Orb+UYwtf2xzdbSJ6wLR2tmmCgvmbhviNDAT+LKEu3Po4HTYBspQWiepT IAIuiqH556VSA== Message-ID: <76a46e34-fc22-477d-a2e6-4767e65a73c4@kernel.org> Date: Wed, 21 Aug 2024 08:22:48 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 4/4] clk: samsung: add top clock support for ExynosAuto v920 SoC To: "sunyeal.hong" , 'Kwanghoon Son' , 'Sylwester Nawrocki' , 'Chanwoo Choi' , 'Alim Akhtar' , 'Michael Turquette' , 'Stephen Boyd' , 'Rob Herring' , 'Conor Dooley' Cc: linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20240819052416.2258976-1-sunyeal.hong@samsung.com> <20240819052416.2258976-5-sunyeal.hong@samsung.com> <7f77dcc41173f2a20a0264b6242ecdac6ea85ad9.camel@samsung.com> <087401daf2a3$4ae602f0$e0b208d0$@samsung.com> <9ee0efad7a27202e6b830996b5ee661a2d350b84.camel@samsung.com> <0a0101daf371$0f2025b0$2d607110$@samsung.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 21/08/2024 04:23, sunyeal.hong wrote: > Hello Kwanghoon, > >> -----Original Message----- >> From: Kwanghoon Son >> Sent: Tuesday, August 20, 2024 6:54 PM >> To: sunyeal.hong ; 'Krzysztof Kozlowski' >> ; 'Sylwester Nawrocki' ; 'Chanwoo >> Choi' ; 'Alim Akhtar' ; >> 'Michael Turquette' ; 'Stephen Boyd' >> ; 'Rob Herring' ; 'Conor Dooley' >> >> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; >> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- >> kernel@vger.kernel.org >> Subject: Re: [PATCH v6 4/4] clk: samsung: add top clock support for >> ExynosAuto v920 SoC >> >> On Tue, 2024-08-20 at 10:50 +0900, sunyeal.hong wrote: >>> Hello Kwanghoon, >>> >>>> -----Original Message----- >>>> From: Kwanghoon Son >>>> Sent: Monday, August 19, 2024 6:32 PM >>>> To: Sunyeal Hong ; Krzysztof Kozlowski >>>> ; Sylwester Nawrocki ; >>>> Chanwoo Choi ; Alim Akhtar >>>> ; Michael Turquette >>>> ; Stephen Boyd ; Rob >>>> Herring ; Conor Dooley >>>> Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; >>>> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; >>>> linux- kernel@vger.kernel.org >>>> Subject: Re: [PATCH v6 4/4] clk: samsung: add top clock support for >>>> ExynosAuto v920 SoC >>>> >>>> On Mon, 2024-08-19 at 14:24 +0900, Sunyeal Hong wrote: >>>>> This adds support for CMU_TOP which generates clocks for all the >>>>> function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For >>>>> CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this >>>>> block and they will generate bus clocks. >>>>> >>>>> Signed-off-by: Sunyeal Hong >>>>> --- >>>>> drivers/clk/samsung/Makefile | 1 + >>>>> drivers/clk/samsung/clk-exynosautov920.c | 1173 >>>>> ++++++++++++++++++++++ >>>>> 2 files changed, 1174 insertions(+) create mode 100644 >>>>> drivers/clk/samsung/clk-exynosautov920.c >>>>> >>>>> diff --git a/drivers/clk/samsung/Makefile >>>>> b/drivers/clk/samsung/Makefile index 3056944a5a54..f1ba48758c78 >>>>> 100644 >>>>> --- a/drivers/clk/samsung/Makefile >>>>> +++ b/drivers/clk/samsung/Makefile >>>>> @@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk- >>>> exynos7.o >>>>> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o >>>>> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o >>>>> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov9.o >>>>> +obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov920.o >>>>> obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-gs101.o >>>>> obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o >>>>> obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210- >>>> audss.o >>>>> diff --git a/drivers/clk/samsung/clk-exynosautov920.c >>>>> b/drivers/clk/samsung/clk-exynosautov920.c >>>>> new file mode 100644 >>>>> index 000000000000..c17d25e3c9a0 >>>>> --- /dev/null >>>>> +++ b/drivers/clk/samsung/clk-exynosautov920.c >>>> >>>> [snip] >>>> >>>>> +}; >>>>> + >>>>> +static const struct samsung_cmu_info peric0_cmu_info __initconst = >> { >>>>> + .mux_clks = peric0_mux_clks, >>>>> + .nr_mux_clks = ARRAY_SIZE(peric0_mux_clks), >>>>> + .div_clks = peric0_div_clks, >>>>> + .nr_div_clks = ARRAY_SIZE(peric0_div_clks), >>>>> + .nr_clk_ids = CLKS_NR_PERIC0, >>>>> + .clk_regs = peric0_clk_regs, >>>>> + .nr_clk_regs = ARRAY_SIZE(peric0_clk_regs), >>>>> + .clk_name = "dout_clkcmu_peric0_noc", >>>> >>>> same question. >>>> Isn't it "noc"? >>>> https://lore.kernel.org/linux-samsung- >>>> soc/58dfae564a4a624e464c7803a309f1f07b5ae83d.camel@samsung.com/ >>>> >>>> In my case(autov9), if put wrong clk_name dmesg will show that, >>>> exynos_arm64_register_cmu: could not enable bus clock ...; err = -2 >>>> >>>> Kwang. >>>> >>>> >>> >>> clk_name follows the guide document provided by hw. v9 is bus, but v920 >> uses noc. >> >> What I mean, >> >> .clk_name = "dout_clkcmu_peric0_noc", // wrong >> .clk_name = "noc", // correct >> >> Because there is no clock-names "dout_clkcmu_peric0_noc" in >> exynos/exynosautov920.dtsi. >> > > The clk_name written here has nothing to do with the device tree. Please look at the code carefully. Hm? I see in the code clearly: clk_get(dev, cmu->clk_name); Where cmu is the discussed struct. If you claim it does not have anything to do with DT, then what is it for? Best regards, Krzysztof