From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: monaco: add QCrypto node
Date: Mon, 22 Dec 2025 10:44:49 +0100 [thread overview]
Message-ID: <76fcf840-e0ce-4647-bff7-4d2f6ac09777@oss.qualcomm.com> (raw)
In-Reply-To: <20251222-enable-qualcomm-crypto-engine-for-monaco-v1-1-06741d6ea66a@oss.qualcomm.com>
On 12/22/25 8:30 AM, Abhinaba Rakshit wrote:
> Add Qualcomm Crypto Engine device node for Monaco platform.
> Bindings and Crypto DMA nodes for the same platform is already
> present in the tree.
>
> QCE and Crypto DMA nodes patch was applied as part of the
> commit a86d84409947 ("arm64: dts: qcom: qcs8300: add QCrypto nodes"),
> however was reverted due to compatible string being miss-matched
> against schema.
>
> Resubmitting the enablement of QCE device node for monaco platform
> with compatible-string being aligned with qcom-qce schema.
>
> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/monaco.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index 816fa2af8a9a663b8ad176f93d2f18284a08c3d1..dd0b9ea27fe1cdfbf6aba07e98183871be7ee889 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> @@ -2350,6 +2350,18 @@ ice: crypto@1d88000 {
> clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
> };
>
> + crypto: crypto@1dfa000 {
> + compatible = "qcom,qcs8300-qce", "qcom,sm8150-qce", "qcom,qce";
> + reg = <0x0 0x01dfa000 0x0 0x6000>;
> + dmas = <&cryptobam 4>, <&cryptobam 5>;
> + dma-names = "rx", "tx";
> + iommus = <&apps_smmu 0x480 0x00>,
"0x00" makes no sense - "0x0" is the concise way to write it and
"0x0000" would be pedantic with the width of the SMR mask field in mind.
Please switch to the former
Konrad
next prev parent reply other threads:[~2025-12-22 9:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 7:30 [PATCH] arm64: dts: qcom: monaco: add QCrypto node Abhinaba Rakshit
2025-12-22 9:29 ` Dmitry Baryshkov
2025-12-23 6:57 ` Abhinaba Rakshit
2025-12-22 9:44 ` Konrad Dybcio [this message]
2025-12-23 6:58 ` Abhinaba Rakshit
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