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Add imx937.dtsi based on imx952.dtsi > and imx937-frdm.dts based on imx952-frdm.dtsi to support the NXP > i.MX937 FRDM board. > > Compared to the i.MX952, the i.MX937 drops the local dimming and ISP > blocks and runs its Cortex-A55 cores at a lower maximum frequency. > > The PCAL6416 GPIO expander is at I2C address 0x21 on i.MX937 FRDM, > unlike 0x20 on i.MX952 FRDM, so disable the inherited node and add > the expander at 0x21. > > Signed-off-by: Joy Zou > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > arch/arm64/boot/dts/freescale/imx937-frdm.dts | 111 ++++++++++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx937.dtsi | 12 +++ > 3 files changed, 124 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index a80cccf34eb5..5945969ada9c 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -944,6 +944,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini-ezurio-wlan.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla-mini-lvds-tm070jvhg33.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-var-dart-sonata.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx937-frdm.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93w-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93w-frdm.dtb > dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx937-frdm.dts b/arch/arm64/boot/dts/freescale/imx937-frdm.dts > new file mode 100644 > index 000000000000..d6be48c81057 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx937-frdm.dts > @@ -0,0 +1,111 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2026 NXP > + */ > + > +/dts-v1/; > + > +#include "imx937.dtsi" > +#include "imx952-frdm.dtsi" > + > +/ { > + model = "NXP i.MX937 FRDM board"; > + compatible = "fsl,imx937-frdm", "fsl,imx937", "fsl,imx952"; > + > + can_mux: mux-controller-0 { > + compatible = "gpio-mux"; > + #mux-control-cells = <0>; > + #mux-state-cells = <1>; > + /* > + * PCAL6416 (0x21) pin 4 selects the CAN/GPIO mux: > + * low selects CAN, high selects GPIO. With GPIO_ACTIVE_HIGH, > + * mux state 0 drives the pin low (CAN) and state 1 high (GPIO). > + */ > + mux-gpios = <&pcal6416_21 4 GPIO_ACTIVE_HIGH>; > + }; > + > + can_mux_pinctrl: pinctrl-gpiomux { > + compatible = "pinctrl-multiplexer"; > + > + can_fun: can-grp { > + mux-states = <&can_mux 0>; > + }; > + > + gpio_fun: gpio-grp { > + mux-states = <&can_mux 1>; > + }; > + }; > +}; Hi Joy, This can mux is also compatible for i.MX952 FRDM. Can you please add it into imx952-frdm.dtsi instead? Then new pinctrl for flexcan2/3 can dropped here too. Regards, Joseph > + > +/* Select CAN on the shared CAN/GPIO mux when FlexCAN is enabled. */ > +&flexcan2 { > + pinctrl-0 = <&pinctrl_flexcan2>, <&can_fun>; > +}; > + > +/* > + * The CAN transceiver silent-mode line is on the 0x21 PCAL6416 on > + * i.MX937 FRDM (the inherited 0x20 expander is disabled below). > + */ > +&flexcan2_phy { > + silent-gpios = <&pcal6416_21 6 GPIO_ACTIVE_HIGH>; > +}; > + > +&flexcan3 { > + pinctrl-0 = <&pinctrl_flexcan3>, <&can_fun>; > +}; > + > +&flexcan3_phy { > + silent-gpios = <&pcal6416_21 6 GPIO_ACTIVE_HIGH>; > +}; > + > +&lpi2c2 { > + pcal6416_21: gpio@21 { > + compatible = "nxp,pcal6416"; > + reg = <0x21>; > + #interrupt-cells = <2>; > + interrupt-controller; > + interrupt-parent = <&gpio5>; > + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; > + #gpio-cells = <2>; > + gpio-controller; > + pinctrl-0 = <&pinctrl_pcal6416>; > + pinctrl-names = "default"; > + vcc-supply = <®_3p3v>; > + }; > +}; > + > +/* > + * The PCAL6416 GPIO expander is at address 0x21 on i.MX937 FRDM, > + * unlike 0x20 on i.MX952 FRDM. Disable the inherited node. > + */ > +&pcal6416 { > + status = "disabled"; > +}; > + > +/* > + * The 0x20 PCAL6416 inherited from imx952-frdm.dtsi is disabled above; > + * re-point every consumer to the 0x21 expander (pcal6416_21). > + */ > +®_ext_3v3 { > + gpio = <&pcal6416_21 13 GPIO_ACTIVE_HIGH>; > +}; > + > +®_ext_5v { > + gpio = <&pcal6416_21 12 GPIO_ACTIVE_HIGH>; > +}; > + > +®_m2_pwr { > + gpio = <&pcal6416_21 11 GPIO_ACTIVE_HIGH>; > +}; > + > +®_usb_vbus { > + gpio = <&pcal6416_21 15 GPIO_ACTIVE_HIGH>; > +}; > + > +®_usdhc3_vmmc { > + gpio = <&pcal6416_21 9 GPIO_ACTIVE_HIGH>; > +}; > + > +&usdhc3_pwrseq { > + reset-gpios = <&pcal6416_21 8 GPIO_ACTIVE_LOW>; > +}; > diff --git a/arch/arm64/boot/dts/freescale/imx937.dtsi b/arch/arm64/boot/dts/freescale/imx937.dtsi > new file mode 100644 > index 000000000000..7912a9c282d8 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx937.dtsi > @@ -0,0 +1,12 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR MIT) > +/* > + * Copyright 2026 NXP > + */ > + > +#include "imx952.dtsi" > + > +&gpu_opp_table { > + opp-1000000000 { > + status = "disabled"; > + }; > +}; >