From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4843FC7EE43 for ; Fri, 9 Jun 2023 08:52:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240024AbjFIIwz (ORCPT ); Fri, 9 Jun 2023 04:52:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240899AbjFIIwe (ORCPT ); Fri, 9 Jun 2023 04:52:34 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5575B2D48 for ; Fri, 9 Jun 2023 01:52:30 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-4f6370ddd27so1847279e87.0 for ; Fri, 09 Jun 2023 01:52:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1686300748; x=1688892748; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=t9M/6Ovu01rsBXyQ4z3CLV3BYJ2AwcXEt+92u20gYU0=; b=iiurC7B4Vrou0Kyj6o9TuEY0C1+Vmop2kkwYy/JwMNiDfk3C9D08hdOM++i6BxmRzd N6XKMnwQDiNi28JaRt3QECP7LHvaVt24MPE22p6pXGwK6auvy0rrH2tYKbG+LGUzpAlh KcL+iHEQsD08trEyX01GdAoZzDL4Yqo7jQ2bZMe0rb62b1161EbSmTqgr768qYVVdbYj GHkJAOdXKod0NW/s29U6r2rdyD0USPziPrBZLcc+Qh2zv37cNG/PnMd7SVTfaAJ/gmkN NORjEeB6Eyz8QdYMI0rYneqdk3CVgwI3riZTea7I72bRNuswmBsd3NSm/R3eEeozJWmT XEnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686300748; x=1688892748; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=t9M/6Ovu01rsBXyQ4z3CLV3BYJ2AwcXEt+92u20gYU0=; b=gl3bFZY/pQTyyNO9Jd8Oco8MZ2cySf6Juu2akQ7sl3q4ico5wpOeyE9rXdoWlaMNHy IJJRwRl+0/JeuJIrm8ytvnDD1PNtE0rgM1sA6C6D6Whw06UxguBQXVFg+GnXErWk07gD 0owpxu2GVxxRAVuP7xrefl1vpYRdtN+uSbU2qWPYN07BwjuBs1rf/7wdUwvZuon8S8AL xUMf3UFkPBb36VFd4v4tXxmonAS2gOA7Zf8LIGEFpLeIQRcPVCVmjJkGXAw5So5iY5Pq HPTVdCdRBTa2gIc0hi0lTbara5UOHfMTTwRpCeaHBvCZBCKR46egOkk1zWHIpcbMap0G wNqQ== X-Gm-Message-State: AC+VfDz8yKILVxysZpzg2JkoYTumZlAcV/FaSAVM2dJ6rDdkCbNtFlP6 nhM77QQiNuUXEf3i0rSlJezcsg== X-Google-Smtp-Source: ACHHUZ6URLbtsV/hVc8kbJlOW1RBbNBO9Skf8vY3qzFMeRqmyo3pp7TL7kBdL12IqDoWVnHxXtbA8Q== X-Received: by 2002:ac2:5f9b:0:b0:4ed:d2cf:857b with SMTP id r27-20020ac25f9b000000b004edd2cf857bmr411360lfe.5.1686300748434; Fri, 09 Jun 2023 01:52:28 -0700 (PDT) Received: from [192.168.1.101] (abyj190.neoplus.adsl.tpnet.pl. [83.9.29.190]) by smtp.gmail.com with ESMTPSA id l13-20020ac24a8d000000b004f3b9adb04asm479339lfp.286.2023.06.09.01.52.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Jun 2023 01:52:27 -0700 (PDT) Message-ID: <79206b05-674b-1f6c-6eb1-ed45e6bd5637@linaro.org> Date: Fri, 9 Jun 2023 10:52:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH 0/3] arm64: dts: qcom: sa8775p: Add interconnect to SMMU To: Parikshit Pareek , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson Cc: Manivannan Sadhasivam , Dmitry Baryshkov , Marijn Suijten , Adam Skladowski , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, "linux-kernel @ vger . kernel . org Prasanna Kumar" , Shazad Hussain References: <20230609054141.18938-1-quic_ppareek@quicinc.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20230609054141.18938-1-quic_ppareek@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 9.06.2023 07:41, Parikshit Pareek wrote: > Some qcom SoCs have SMMUs, which need the interconnect bandwidth to be > This series introduce the due support for associated interconnect, and > setting of the due interconnect-bandwidth. Setting due interconnect > bandwidth is needed to avoid the issues like [1], caused by not having > due clock votes(indirectly dependent upon interconnect bandwidth). [1] ??? Konrad > > Parikshit Pareek (3): > dt-bindings: arm-smmu: Add interconnect for qcom SMMUs > arm64: dts: qcom: sa8775p: Add interconnect to PCIe SMMU > iommu/arm-smmu-qcom: Add support for the interconnect > > .../devicetree/bindings/iommu/arm,smmu.yaml | 22 +++++++++++++++++++ > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++++ > drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 16 ++++++++++++++ > 3 files changed, 42 insertions(+) >