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[78.26.46.173]) by smtp.gmail.com with ESMTPSA id z20-20020a056512309400b0048a93325906sm410128lfd.171.2022.07.25.09.44.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 25 Jul 2022 09:44:40 -0700 (PDT) Message-ID: <7994d7c7-ae13-a136-f60c-40fd9918565d@linaro.org> Date: Mon, 25 Jul 2022 18:44:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [EXT] Re: [PATCH v3 3/4] dt-bindings: irqchip: imx mu work as msi controller Content-Language: en-US To: Frank Li , "jdmason@kudzu.us" , "maz@kernel.org" , "tglx@linutronix.de" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kw@linux.com" , "bhelgaas@google.com" Cc: "kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-pci@vger.kernel.org" , Peng Fan , Aisheng Dong , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "kishon@ti.com" , "lorenzo.pieralisi@arm.com" , "ntb@lists.linux.dev" References: <20220720213036.1738628-1-Frank.Li@nxp.com> <20220720213036.1738628-4-Frank.Li@nxp.com> <2c11d0b0-b012-ea24-5c3c-305bbdd231a0@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 25/07/2022 18:29, Frank Li wrote: > > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: Saturday, July 23, 2022 1:50 PM >> To: Frank Li ; jdmason@kudzu.us; maz@kernel.org; >> tglx@linutronix.de; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; >> shawnguo@kernel.org; s.hauer@pengutronix.de; kw@linux.com; >> bhelgaas@google.com >> Cc: kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-arm- >> kernel@lists.infradead.org; linux-pci@vger.kernel.org; Peng Fan >> ; Aisheng Dong ; >> kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx > imx@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; >> ntb@lists.linux.dev >> Subject: [EXT] Re: [PATCH v3 3/4] dt-bindings: irqchip: imx mu work as msi >> controller >> >> Caution: EXT Email >> >> On 20/07/2022 23:30, Frank Li wrote: >>> imx mu support generate irq by write a register. >>> provide msi controller support so other driver >>> can use it by standard msi interface. >> >> Please start sentences with capital letter. Unfortunately I don't >> understand the sentences. Please describe shortly the hardware. > > [Frank Li] MU have 4 registers and both side A and B. If write one of > Register, irq will be trigger at the other side. > > For example, writle(a side reg1, 0). Then b side irq will be trigged. > >> >> >>> >>> Signed-off-by: Frank Li >>> --- >>> .../interrupt-controller/fsl,mu-msi.yaml | 88 +++++++++++++++++++ >>> 1 file changed, 88 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/interrupt- >> controller/fsl,mu-msi.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- >> msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- >> msi.yaml >>> new file mode 100644 >>> index 0000000000000..e125294243af3 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu- >> msi.yaml >>> @@ -0,0 +1,88 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicet >> ree.org%2Fschemas%2Finterrupt-controller%2Ffsl%2Cmu- >> msi.yaml%23&data=05%7C01%7CFrank.Li%40nxp.com%7Cfcec12a0731c >> 454af5c308da6cdc2a0e%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0 >> %7C637941990101591376%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLj >> AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C% >> 7C%7C&sdata=9h9nKyvsWaghry1hkpa5aaxVGYpx6xZRTxhN0S4uB50%3 >> D&reserved=0 >>> +$schema: >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicet >> ree.org%2Fmeta- >> schemas%2Fcore.yaml%23&data=05%7C01%7CFrank.Li%40nxp.com%7 >> Cfcec12a0731c454af5c308da6cdc2a0e%7C686ea1d3bc2b4c6fa92cd99c5c3016 >> 35%7C0%7C0%7C637941990101591376%7CUnknown%7CTWFpbGZsb3d8eyJ >> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D% >> 7C3000%7C%7C%7C&sdata=wagM3hl8fpJSm%2Bibw6ENl5lNlQ9fVEHzS >> OlT%2Bjoridg%3D&reserved=0 >>> + >>> +title: NXP i.MX Messaging Unit (MU) work as msi controller >>> + >>> +maintainers: >>> + - Frank Li >>> + >>> +description: | >>> + The Messaging Unit module enables two processors within the SoC to >>> + communicate and coordinate by passing messages (e.g. data, status >>> + and control) through the MU interface. The MU also provides the ability >>> + for one processor to signal the other processor using interrupts. >>> + >>> + Because the MU manages the messaging between processors, the MU >> uses >>> + different clocks (from each side of the different peripheral buses). >>> + Therefore, the MU must synchronize the accesses from one side to the >>> + other. The MU accomplishes synchronization using two sets of matching >>> + registers (Processor A-facing, Processor B-facing). >>> + >>> + MU can work as msi interrupt controller to do doorbell >>> + >>> +allOf: >>> + - $ref: /schemas/interrupt-controller/msi-controller.yaml# >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - fsl,imx6sx-mu-msi >>> + - fsl,imx7ulp-mu-msi >>> + - fsl,imx8ulp-mu-msi >>> + - fsl,imx8ulp-mu-msi-s4 >>> + >>> + reg: >>> + minItems: 2 >> >> Not minItems but maxItems in general, but anyway you need to actually >> list and describe the items (and then skip min/max) > [Frank Li] > I am not sure format. Any example? > > Reg: > Items: > - description: a side register > - description: b side register Yes, but then explain what is A and B in bindings description. Why MU, which sits on A side needs to access other side (B) registers? >> >>> + >>> + reg-names: >>> + items: >>> + - const: a >>> + - const: b >>> + >>> + interrupts: >>> + maxItems: 1 >>> + >>> + clocks: >>> + maxItems: 1 >>> + >>> + power-domains: >>> + maxItems: 2 >> >> and here you correctly use maxItems, so why min in reg? Anyway, instead >> you need to list and describe the items. > > Does format is similar with reg? Yes. > >> >> Actually I asked you this last time about interrupts, so you ignored >> that comment. > > Sorry, which one. Is it below one? > > --- >> + interrupts: >> + minItems: 1 >> + maxItems: 2 > > Instead describe the items. Yes. Best regards, Krzysztof