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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIzMDA1MCBTYWx0ZWRfX/W/GylYgEFDA 2WDN+oIYZHvfuyn/D6PEmRO41OAKDC9FdgS1upP4PHyMuRV1NTTWoJ53U+bx9xfGbGPdIwYGGl7 3uWSopz+5D/gNURAyJPNdK9/j4FXH5998QKYYoczqUIzxDD+Wijc18fMJjlePZw57xmEnBq82g+ x2HGzLUucyJXl9vbQUIdVm+29AOxOsbraSdVYp7FXZY0u0d/k5JlLqu1E7WsCGbX76f4mYz3IFs iiIH1BQhb/5RirbJGw4/c/fIk3z4KGX37CaTz46iyk5Wx+Vl2+bEYLp8u/SN2zPVEYo1bWOBPGc u0x5fJRkmtQEXZeOy7HL1uCtZVnSNGb2nk9/VAXs66gvfNrTWhGG5CO77T2uAPLTSeDvGCiANyN cbpBhyKTLspkx07uXC2NTMK0MXk1+DihNv2Ve+TlQgJTsrEw/mdbVfJI0e5cbkr/IJbyevmMtJ+ s6aFGWHwCJQLigsni1A== X-Authority-Analysis: v=2.4 cv=P9evFSAu c=1 sm=1 tr=0 ts=6ab3c8d5 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=uF-LihhT4cVmO8x6xb0A:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-ORIG-GUID: PbLSmtiaeC2Rtyl6rk6nFe29YK2GMz4E X-Proofpoint-GUID: PbLSmtiaeC2Rtyl6rk6nFe29YK2GMz4E X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIzMDA1MCBTYWx0ZWRfXwdeVgg4rgRZ6 OE5czn1p2XdY9H+MtaVT3hKajJwVMXCXibPUSNhJjL/3LLpOsMOE82DbxKBIqVh4gHDblh8M4Nj G58t61ZgLSIJy2Z44gU202vjg2AWTrM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-23_04,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 malwarescore=0 priorityscore=1501 phishscore=0 clxscore=1015 bulkscore=0 suspectscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609230050 On 9/22/26 10:24 AM, Bartosz Golaszewski wrote: > On Tue, 22 Sep 2026 07:34:25 +0200, Mukesh Savaliya > said: >> >> >> On 9/21/2026 8:16 PM, Bartosz Golaszewski wrote: >> [...] >> >>> +#include >>> #include >>> >>> / { >>> @@ -909,6 +910,28 @@ soc: soc@0 { >>> dma-ranges = <0 0 0 0 0x10 0>; >>> ranges = <0 0 0 0 0x10 0>; >>> >>> + gpi_dma2: dma-controller@800000 { >>> + compatible = "qcom,nord-gpi-dma", "qcom,sm6350-gpi-dma"; >>> + reg = <0x0 0x00800000 0x0 0x60000>; >>> + #dma-cells = <3>; >>> + interrupts = , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + , >>> + ; >>> + dma-channels = <12>; >>> + dma-channel-mask = <0xfff>; >>> + iommus = <&apps_smmu_0 0x15b6 0x0>; >>> + status = "disabled"; >> >> we should be keeping GPI node default enabled similar to common QUPv3 >> wrapper node. >> status = "ok" for all the nodes. >> > > The pattern across Qualcomm platforms seems to disable the GPI DMA nodes at > SoC-level and only enable them at board-level. For no reason - the DMA engines may be reserved through TZ config, but for the past (high) N years that hasn't been the case Konrad