From: Xingyu Wu <xingyu.wu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v2 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Date: Wed, 22 Feb 2023 09:48:12 +0800 [thread overview]
Message-ID: <7b3e09f0-a44f-0735-a049-eef7f0acec4c@starfivetech.com> (raw)
In-Reply-To: <ae468e63-d8d3-dbfb-64da-75a147e1cd2d@linaro.org>
On 2023/2/21 21:37, Krzysztof Kozlowski wrote:
> On 21/02/2023 14:01, Xingyu Wu wrote:
>> On 2023/2/21 19:25, Krzysztof Kozlowski wrote:
>>> On 21/02/2023 09:33, Xingyu Wu wrote:
>>>> Add bindings for the System-Top-Group clock and reset generator (STGCRG)
>>>> on the JH7110 RISC-V SoC by StarFive Ltd.
>>>>
>>>> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
>>>
>>>
>>>> + };
>>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>>> index 93eb504c3b21..2e70c9f21989 100644
>>>> --- a/MAINTAINERS
>>>> +++ b/MAINTAINERS
>>>> @@ -19914,6 +19914,7 @@ F: arch/riscv/boot/dts/starfive/
>>>> STARFIVE JH71X0 CLOCK DRIVERS
>>>> M: Emil Renner Berthing <kernel@esmil.dk>
>>>> M: Hal Feng <hal.feng@starfivetech.com>
>>>> +M: Xingyu Wu <xingyu.wu@starfivetech.com>
>>>
>>> No improvements here. You add here new bindings for one device and then
>>> - without explanation - add yourself to all Starfive clock bindings.
>>> Either explain it or drop it or move it to separate patch.
>>>
>>> You already got comment for this.
>>>
>>
>> Sorry, I didn't understand what you meant before. Now my understanding is that,
>> If I improvements JH71X0 driver no JH7110 driver, I could add this here. Right?
>>
>> Is it OK if I do it this way to move it to separate patch like this?:
>> +STARFIVE JH7110 STG CLOCK DRIVERS
>> +M: Xingyu Wu <xingyu.wu@starfivetech.com>
>
> If you want to be the maintainer of all drivers, add separate commit for
> this, so this is obvious. Or at least explain this change in commit msg.
>
OK, got it. Thanks.
Best regard,
Xingyu Wu
next prev parent reply other threads:[~2023-02-22 1:48 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-21 8:33 [PATCH v2 00/11] Add new partial clock and reset drivers for StarFive JH7110 Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu
2023-02-21 11:25 ` Krzysztof Kozlowski
2023-02-21 13:01 ` Xingyu Wu
2023-02-21 13:37 ` Krzysztof Kozlowski
2023-02-22 1:48 ` Xingyu Wu [this message]
2023-03-02 15:05 ` Emil Renner Berthing
2023-03-03 3:14 ` Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 02/11] reset: starfive: jh7110: Add StarFive System-Top-Group reset support Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu
2023-03-02 15:16 ` Emil Renner Berthing
2023-02-21 8:33 ` [PATCH v2 04/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu
2023-02-21 11:26 ` Krzysztof Kozlowski
2023-02-21 8:33 ` [PATCH v2 05/11] reset: starfive: jh7110: Add StarFive Image-Signal-Process reset support Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu
2023-03-02 15:39 ` Emil Renner Berthing
2023-03-03 3:59 ` Xingyu Wu
2023-03-03 9:01 ` Emil Renner Berthing
2023-03-03 9:14 ` Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu
2023-02-21 11:27 ` Krzysztof Kozlowski
2023-02-21 8:33 ` [PATCH v2 08/11] reset: starfive: jh7110: Add StarFive Video-Output reset support Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 09/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu
2023-03-02 15:48 ` Emil Renner Berthing
2023-03-03 3:37 ` Xingyu Wu
2023-03-03 9:23 ` Emil Renner Berthing
2023-03-03 9:44 ` Xingyu Wu
2023-03-03 9:51 ` Emil Renner Berthing
2023-02-21 8:33 ` [PATCH v2 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu
2023-02-27 19:55 ` Conor Dooley
2023-02-28 1:40 ` Xingyu Wu
2023-02-21 8:33 ` [PATCH v2 11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu
2023-02-27 19:53 ` Conor Dooley
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