Re: [PATCH v4 5/6] clk: meson: axg-audio: Add the mclk pad div for s4 chip

kernel test robot
2025-03-20T10:06:10Z

Hi jiebing,

kernel test robot noticed the following build errors:

[auto build test ERROR on 6ecd20965bdc21b265a0671ccf36d9ad8043f5ab]

url: https://github.com/intel-lab-lkp/linux/commits/jiebing-chen-via-B4-Relay/dt-bindings-clock-meson-Add-audio-power-domain-for-s4-soc/20250319-151110
base: 6ecd20965bdc21b265a0671ccf36d9ad8043f5ab
patch link: https://lore.kernel.org/r/20250319-audio_drvier-v4-5-686867fad719%40amlogic.com
patch subject: [PATCH v4 5/6] clk: meson: axg-audio: Add the mclk pad div for s4 chip
config: arm64-randconfig-001-20250320 (https://download.01.org/0day-ci/archive/20250320/202503201714.sI6HIkYs-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 87916f8c32ebd8e284091db9b70339df57fd1e90)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250320/202503201714.sI6HIkYs-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503201714.sI6HIkYs-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/clk/meson/axg-audio.c:2228:34: error: cannot assign to variable 'aud_regmap_config' with const-qualified type 'const struct regmap_config'
2228 | aud_regmap_config.max_register = resource_size(res) - 4;
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/clk/meson/axg-audio.c:2220:37: note: variable 'aud_regmap_config' declared const here
2220 | static const struct regmap_config aud_regmap_config = {
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
2221 | .reg_bits = 32,
| ~~~~~~~~~~~~~~~
2222 | .val_bits = 32,
| ~~~~~~~~~~~~~~~
2223 | .reg_stride = 4,
| ~~~~~~~~~~~~~~~~
2224 | };
| ~
drivers/clk/meson/axg-audio.c:2229:26: error: cannot assign to variable 'aud_regmap_config' with const-qualified type 'const struct regmap_config'
2229 | aud_regmap_config.name =
| ~~~~~~~~~~~~~~~~~~~~~~ ^
drivers/clk/meson/axg-audio.c:2220:37: note: variable 'aud_regmap_config' declared const here
2220 | static const struct regmap_config aud_regmap_config = {
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
2221 | .reg_bits = 32,
| ~~~~~~~~~~~~~~~
2222 | .val_bits = 32,
| ~~~~~~~~~~~~~~~
2223 | .reg_stride = 4,
| ~~~~~~~~~~~~~~~~
2224 | };
| ~
2 errors generated.

vim +2228 drivers/clk/meson/axg-audio.c

2175
2176 static int axg_audio_clkc_probe(struct platform_device *pdev)
2177 {
2178 struct device *dev = &pdev->dev;
2179 const struct audioclk_data *data;
2180 struct axg_audio_reset_data *rst;
2181 struct regmap *map;
2182 void __iomem *regs;
2183 struct clk_hw *hw;
2184 struct clk *clk;
2185 int ret, i;
2186
2187 data = of_device_get_match_data(dev);
2188 if (!data)
2189 return -EINVAL;
2190
2191 regs = devm_platform_ioremap_resource(pdev, 0);
2192 if (IS_ERR(regs))
2193 return PTR_ERR(regs);
2194
2195 axg_audio_regmap_cfg.max_register = data->max_register;
2196 map = devm_regmap_init_mmio(dev, regs, &axg_audio_regmap_cfg);
2197 if (IS_ERR(map)) {
2198 dev_err(dev, "failed to init regmap: %ld\n", PTR_ERR(map));
2199 return PTR_ERR(map);
2200 }
2201
2202 /* Get the mandatory peripheral clock */
2203 clk = devm_clk_get_enabled(dev, "pclk");
2204 if (IS_ERR(clk))
2205 return PTR_ERR(clk);
2206
2207 ret = device_reset(dev);
2208 if (ret) {
2209 dev_err_probe(dev, ret, "failed to reset device\n");
2210 return ret;
2211 }
2212
2213 /* Populate regmap for the regmap backed clocks */
2214 for (i = 0; i < data->regmap_clk_num; i++)
2215 data->regmap_clks[i]->map = map;
2216
2217 /* some amlogic chip clock pad reg domian is different */
2218 if (audio_clock_pad_is_new_regmap(dev->of_node)) {
2219 struct resource *res;
2220 static const struct regmap_config aud_regmap_config = {
2221 .reg_bits = 32,
2222 .val_bits = 32,
2223 .reg_stride = 4,
2224 };
2225 regs = devm_platform_get_and_ioremap_resource(pdev, 1, &res);
2226 if (IS_ERR(regs))
2227 return PTR_ERR(regs);
> 2228 aud_regmap_config.max_register = resource_size(res) - 4;
2229 aud_regmap_config.name =
2230 devm_kasprintf(dev, GFP_KERNEL, "%s-%s", dev->of_node->name, "pads");
2231 map = devm_regmap_init_mmio(dev, regs, &aud_regmap_config);
2232 /* Populate clk pad regmap for the regmap backed clocks */
2233 for (i = 0; i < data->regmap_clk_pads_num; i++)
2234 data->regmap_clks_pads[i]->map = map;
2235 }
2236 /* Take care to skip the registered input clocks */
2237 for (i = AUD_CLKID_DDR_ARB; i < data->hw_clks.num; i++) {
2238 const char *name;
2239
2240 hw = data->hw_clks.hws[i];
2241 /* array might be sparse */
2242 if (!hw)
2243 continue;
2244
2245 name = hw->init->name;
2246 ret = devm_clk_hw_register(dev, hw);
2247 if (ret) {
2248 dev_err(dev, "failed to register clock %s\n", name);
2249 return ret;
2250 }
2251 }
2252
2253 ret = devm_of_clk_add_hw_provider(dev, meson_clk_hw_get, (void *)&data->hw_clks);
2254 if (ret)
2255 return ret;
2256
2257 /* Stop here if there is no reset */
2258 if (!data->reset_num)
2259 return 0;
2260
2261 rst = devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL);
2262 if (!rst)
2263 return -ENOMEM;
2264
2265 rst->map = map;
2266 rst->offset = data->reset_offset;
2267 rst->rstc.nr_resets = data->reset_num;
2268 rst->rstc.ops = &axg_audio_rstc_ops;
2269 rst->rstc.of_node = dev->of_node;
2270 rst->rstc.owner = THIS_MODULE;
2271
2272 return devm_reset_controller_register(dev, &rst->rstc);
2273 }
2274

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