From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A6141DD54F; Tue, 8 Oct 2024 08:20:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375637; cv=none; b=TU3ljBtI5ft3FhYCHFAEFaX/rGAdt8c5KX9raR2RHz2JyZsWmmVX83TUYlp2mejHtnsXo9YfOKNbvcNuzqht34pfsA1CVw/gev1VHI6iGEwePyEmB3mIVdyvgscW+0z3KP6LTV8Fw5a35+6HTHt8VypXphihvBmlIFdmPRJj4Bk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728375637; c=relaxed/simple; bh=xCCK6RUOuxARbyEGhETA3FiKI88jMUI0oByK8lc/T6M=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=nZa+j23biGux5NJcqFAGo14AFKozy3+kT+kNlCLJQOYv9ZbYQl1YF86VzB2QP0Ma0yrnZYBHSOHpSO2QCxl1dOnJjDXJZ9F/oSJp0KQWb0j6HtW9spjUvZenF9xnxLoFIZnxj4j1bw4d0DeB7VO1SSHkblzOSr3HQK/vShCI+so= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=adDnCqNc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="adDnCqNc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 239D3C4CEC7; Tue, 8 Oct 2024 08:20:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1728375637; bh=xCCK6RUOuxARbyEGhETA3FiKI88jMUI0oByK8lc/T6M=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=adDnCqNcZGwjB6MO8+9wRFVHl/JvqhqZJ7QEPucNZEqfqi7JV+kOP9Fiy09DUY/eg eXVn+sNyGOaRuvoUyLQzVmfRy4CoJHNY18PYGgyclHxYbccewhTk7FgjpfRxpYcglc 7zA2CS/JMqobi+UlOf7MWZVM4/6MlC7+gy5v6ulehOV1yuY/3HInPCzZlGMSwd51ZO oJqoDyrNH1enX2ILtDZJ7CVenu/5Fc+vYm2wJAHKnLlLiSna/1FrhIvhbb2s7K/di5 aBle26gb6A3tIyArC4x9W3ZwzHJbeyAqthzNrmfYSgc/4o4Q0Q5ez/QzKqnpfFJQ7X JzQ3rsFMkXGIQ== Message-ID: <7bce31c0-8c74-4d65-812f-01951a0d75d1@kernel.org> Date: Tue, 8 Oct 2024 10:20:29 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] dt-bindings: clock: imx8m-anatop: support spread spectrum clocking To: Dario Binacchi Cc: linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , Michael Turquette , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org References: <20240928083804.1073942-1-dario.binacchi@amarulasolutions.com> <20240928083804.1073942-2-dario.binacchi@amarulasolutions.com> <566859c1-a397-4465-987e-0682b07a703e@kernel.org> <6c3e6071-822f-4230-b76b-276330de07ef@kernel.org> <82db5037-bbd3-4005-bde9-02df1bf4c475@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 07/10/2024 17:02, Dario Binacchi wrote: > On Sun, Oct 6, 2024 at 3:13 PM Krzysztof Kozlowski wrote: >> >> On 05/10/2024 10:57, Dario Binacchi wrote: >>> On Thu, Oct 3, 2024 at 12:46 PM Krzysztof Kozlowski wrote: >>>> >>>> On 01/10/2024 08:29, Dario Binacchi wrote: >>>>> On Mon, Sep 30, 2024 at 8:45 AM Krzysztof Kozlowski wrote: >>>>>> >>>>>> On 29/09/2024 22:00, Dario Binacchi wrote: >>>>>>>> >>>>>>>> >>>>>>>>> + properties: >>>>>>>>> + compatible: >>>>>>>>> + contains: >>>>>>>>> + enum: >>>>>>>>> + - fsl,imx8mm-anatop >>>>>>>>> + >>>>>>>>> +then: >>>>>>>>> + properties: >>>>>>>>> + fsl,ssc-clocks: >>>>>>>> >>>>>>>> Nope. Properties must be defined in top-level. >>>>>>>> >>>>>>>>> + $ref: /schemas/types.yaml#/definitions/phandle-array >>>>>>>>> + description: >>>>>>>>> + The phandles to the PLLs with spread spectrum clock generation >>>>>>>>> + hardware capability. >>>>>>>> >>>>>>>> These should be clocks. >>>>>>> >>>>>>> Sorry, but I can't understand what you're asking me. >>>>>>> Could you kindly explain it to me in more detail? >>>>>> >>>>>> You added new property instead of using existing one for this purpose: >>>>>> 'clocks'. >>>>> >>>>>> >>>>>> >>>>>> >>>>>> Best regards, >>>>>> Krzysztof >>>>>> >>>>> >>>>> I added this new property specifically for managing spread-spectrum. >>>>> Indeed, not all clocks/PLLs >>>>> managed by the node/peripheral support spread-spectrum, and the added >>>>> properties specify >>>>> parameters for enabling and tuning SSC for each individual PLL based >>>>> on the index of each list. >>>>> If I were to use the 'clocks' property and add a clock to this list >>>>> that does not support SSC, IMHO >>>>> the pairings would be less clear. >>>> >>>> You duplicate property with argument "pairings shall match". Well, I am >>>> not happy with the duplication. Clocks have specific order, thus it is >>>> explicit which one needs tuning. Your other properties can match them as >>>> well, just index from clocks is offset... >>> >>> Just to check if I understood correctly what you are suggesting before >>> submitting version 3 of the patch. >>> Something, for example, like: >>> >>> clocks = <&clk, IMX8MP_AUDIO_PLL1>, <&clk, IMX8MP_AUDIO_PLL2>, <&clk >>> IMX8MP_VIDEO_PLL1>; >>> fsl,ssc-modfreq-hz = <0, 3517>, <2, 6818>; >> >> Hm, what is 0? If clock index, then no, it's redundant. The first item >> in cannot point to other clock. >> >> Also, what exactly are you setting here > > I am enabling and configuring the spread spectrum. > > Normal clock: Without spread spectrum, the clock signal has a fixed and > repetitive frequency (e.g., 100 MHz). This frequency generates an > electromagnetic > signal concentrated on a single frequency, and if strong enough, it can disturb > other devices. > > Spread spectrum: With spread spectrum, the clock frequency is > slightly "modulated," > meaning it oscillates around a central value. For example, if the base > frequency is 100 MHz, > the clock might vary between 99.5 MHz and 100.5 MHz in a cyclic manner. This > small variation spreads the energy over a wider range of frequencies > (from 99.5 to 100.5 MHz), > reducing the intensity of the signal at any one frequency. Sure, so each board will come with its own, different values and you will not put into the SoC DTSI? Where is the DTS? I received only this patch. > >> and why assigned-clock-rates are >> not working? > > The traditional clock properties, such as clocks, > assigned-clocks-rates, etc retain their usual > meaning even when spread spectrum is applied. However, to implement > the spread spectrum > mechanism in a circuit with a PLL (Phase-Locked Loop), additional > specific parameters are > introduced to properly configure the frequency modulation: > > - Modulation frequency: i. e. fsl,ssc-modfreq-hz > - Modulation rate: i.e. fsl,ssc-modrate-percent > - Modulation type: i. e. fsl,ssc-modmethod (center-spread, down-spread) > > Additionally, it should be noted that not all anatop PLLs are equipped > with circuitry for spread > spectrum, but only a small subset of them. This is the reason why I > introduced the property > "fsl, ssc-clocks". > > This is another commit [1] on enabling spread spectrum that I > implemented some time ago for > the am335x. The most evident difference is that in that case the node > was a clock node and not > a clock controller, as in the case of anatop. The parameters are also > not exactly the same, but > that depends on the platform. > > [1] 4a8bc2644ef0cbf8e ("dt-bindings: ti: dpll: add spread spectrum support") OK, I still do not know what "0" was, but the items are fixed, so you know exactly which clock you are configuring here. Best regards, Krzysztof