Re: [PATCH 2/5] spi: cadence: Add Marvell IP modification changes

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 29/03/2024 20:48, Witold Sadowski wrote:
> Add support for Marvell IP modification - clock divider,
> and PHY config, and IRQ clearing.
> Clock divider block is build into Cadence XSPI controller
> and is connected directly to 800MHz clock.
> As PHY config is not set directly in IP block, driver can
> load custom PHY configuration values.
> To correctly clear interrupt in Marvell implementation
> MSI-X must be cleared too.

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

> 
> Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
> ---


> +
> +static bool cdns_xspi_get_hw_overlay(struct platform_device *pdev)
> +{
> +	int err;
> +
> +	err = device_property_match_string(&pdev->dev,
> +					   "compatible", "mrvl,xspi-nor");

No, do not add matching in some random parts of the code, but use driver
match/data from ID table.

....

>  
> +	cdns_xspi_print_phy_config(cdns_xspi);
>  	ret = cdns_xspi_controller_init(cdns_xspi);
>  	if (ret) {
>  		dev_err(dev, "Failed to initialize controller\n");
> @@ -613,6 +911,9 @@ static const struct of_device_id cdns_xspi_of_match[] = {
>  	{
>  		.compatible = "cdns,xspi-nor",
>  	},
> +	{
> +		.compatible = "mrvl,xspi-nor",

This falsely suggest they are compatible :/

> +	},
>  	{ /* end of table */}
>  };
>  MODULE_DEVICE_TABLE(of, cdns_xspi_of_match);

Best regards,
Krzysztof