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From: Dmitry Osipenko <digetx@gmail.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
	thierry.reding@gmail.com, jonathanh@nvidia.com,
	frankc@nvidia.com, hverkuil@xs4all.nl, sakari.ailus@iki.fi,
	robh+dt@kernel.org, helen.koike@collabora.com
Cc: gregkh@linuxfoundation.org, linux-media@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 08/10] gpu: host1x: mipi: Keep MIPI clock enabled and mutex locked till calibration done
Date: Fri, 7 Aug 2020 07:01:36 +0300	[thread overview]
Message-ID: <7c47b165-8663-87f0-bff5-37036d472fb9@gmail.com> (raw)
In-Reply-To: <54e01160-4041-f8fa-065d-f635e8d69e2f@nvidia.com>

07.08.2020 06:18, Sowjanya Komatineni пишет:
> 
> On 8/6/20 8:14 PM, Sowjanya Komatineni wrote:
>>
>> On 8/6/20 8:10 PM, Sowjanya Komatineni wrote:
>>>
>>> On 8/6/20 7:31 PM, Dmitry Osipenko wrote:
>>>> 06.08.2020 22:01, Sowjanya Komatineni пишет:
>>>> ...
>>>>> +int tegra_mipi_start_calibration(struct tegra_mipi_device *device)
>>>>>   {
>>>>>       const struct tegra_mipi_soc *soc = device->mipi->soc;
>>>>>       unsigned int i;
>>>>> @@ -381,12 +375,16 @@ int tegra_mipi_calibrate(struct
>>>>> tegra_mipi_device *device)
>>>>>       value |= MIPI_CAL_CTRL_START;
>>>>>       tegra_mipi_writel(device->mipi, value, MIPI_CAL_CTRL);
>>>>>   -    mutex_unlock(&device->mipi->lock);
>>>>> -    clk_disable(device->mipi->clk);
>>>>> +    /*
>>>>> +     * Wait for min 72uS to let calibration logic finish calibration
>>>>> +     * sequence codes before waiting for pads idle state to apply the
>>>>> +     * results.
>>>>> +     */
>>>>> +    usleep_range(75, 80);
>>>> Could you please explain why the ACTIVE bit can't be polled instead of
>>>> using the fixed delay? Doesn't ACTIVE bit represents the state of the
>>>> busy FSM?
>>>
>>> Based on internal discussion, ACTIVE bit gets cleared when all
>>> enabled pads calibration is done (same time as when DONE set to 1).
>>>
>>> Will request HW designer to look into design and confirm exactly when
>>> ACTIVE bit gets cleared.
>>>
>>> Will get back on this.
>>>
>> Verified with HW designer. above is correct. ACTIVE bit update happens
>> same time as DONE bit.
>>
>> Active = !(DONE)
>>
>> In case of calibration logic waiting for LP-11 where done bit does not
>> get set, ACTIVE will still be 1 and on next start trigger new
>> calibration will start
>>
> Based on internal design check from designer, as long as its in waiting
> for LP-11 stage, next calibration request can be triggered again but
> ACTIVE bit we will see it at 1. So we should check for DONE bits to
> confirm if calibration is done or not.
> 
> To start next calibration, it can take effect as long as its in wait for
> LP-11 mode.

I meant the start_calibration() will poll the ACTIVE bit (calibration
busy), while the finish_calibration() will poll the DONE bit
(calibration applied).

  reply	other threads:[~2020-08-07  4:01 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-06 19:01 [PATCH v9 00/10] Support for Tegra video capture from external sensor Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 01/10] media: tegra-video: Fix channel format alignment Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 02/10] media: tegra-video: Enable TPG based on kernel config Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 03/10] media: tegra-video: Update format lookup to offset based Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 04/10] dt-bindings: tegra: Update VI and CSI bindings with port info Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 05/10] media: tegra-video: Separate CSI stream enable and disable implementations Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 06/10] media: tegra-video: Add support for external sensor capture Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 07/10] media: tegra-video: Add support for selection ioctl ops Sowjanya Komatineni
2020-08-06 19:01 ` [PATCH v9 08/10] gpu: host1x: mipi: Keep MIPI clock enabled and mutex locked till calibration done Sowjanya Komatineni
2020-08-07  2:31   ` Dmitry Osipenko
2020-08-07  3:10     ` Sowjanya Komatineni
2020-08-07  3:14       ` Sowjanya Komatineni
2020-08-07  3:18         ` Sowjanya Komatineni
2020-08-07  4:01           ` Dmitry Osipenko [this message]
2020-08-07  4:05             ` Sowjanya Komatineni
2020-08-07  4:06               ` Sowjanya Komatineni
2020-08-07  4:08                 ` Dmitry Osipenko
2020-08-06 19:01 ` [PATCH v9 09/10] media: tegra-video: Add CSI MIPI pads calibration Sowjanya Komatineni
2020-08-11 18:49   ` Dmitry Osipenko
2020-08-06 19:01 ` [PATCH v9 10/10] media: tegra-video: Compute settle times based on the clock rate Sowjanya Komatineni

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