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Wed, 21 Aug 2024 04:39:39 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47L4dcQo022094 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 21 Aug 2024 04:39:38 GMT Received: from [10.216.8.12] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 20 Aug 2024 21:39:33 -0700 Message-ID: <7ca8aec5-b330-4ece-a0b3-895f3a1f6ba2@quicinc.com> Date: Wed, 21 Aug 2024 10:09:30 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] clk: qcom: Add support for GCC on QCS8300 To: Krzysztof Kozlowski CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , "Ajit Pandey" , Taniya Das , Jagadeesh Kona , Satya Priya Kakitapalli , , , , , References: <20240820-qcs8300-gcc-v1-0-d81720517a82@quicinc.com> <5011eeb2-61e3-495a-85b3-e7c608340a82@quicinc.com> Content-Language: en-US From: Imran Shaik In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: oyLPIS4XooWMu4DNQKunDuYvxqga7tQC X-Proofpoint-ORIG-GUID: oyLPIS4XooWMu4DNQKunDuYvxqga7tQC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-08-21_04,2024-08-19_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 spamscore=0 phishscore=0 mlxlogscore=999 bulkscore=0 malwarescore=0 priorityscore=1501 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2408210031 On 8/20/2024 4:32 PM, Krzysztof Kozlowski wrote: > On Tue, Aug 20, 2024 at 03:38:39PM +0530, Imran Shaik wrote: >> >> >> On 8/20/2024 3:27 PM, Krzysztof Kozlowski wrote: >>> On 20/08/2024 11:36, Imran Shaik wrote: >>>> This series adds the dt-bindings and driver support for GCC on QCS8300 platform. >>>> >>>> Please note that this series is dependent on [1] which adds support >>>> for QCS8275/QCS8300 SoC ID. >>>> >>>> [1] https://lore.kernel.org/all/20240814072806.4107079-1-quic_jingyw@quicinc.com/ >>> >>> How do the depend? What is exactly the dependency? >>> >>> If so this cannot be merged... >>> >> >> They are not functionally dependent, but we want to ensure the base QCS8300 >> changes to merge first and then our GCC changes. Hence added the dependency. > > This does not work like that, these are different trees, even if they go > via Bjorn. > > Why do you insist on some specific workflow, different than every > upstreaming process? What is so special here? > > If you keep insisting, I will keep disagreeing, because it is not > justified and just complicates things unnecessarily. My bad, there is no dependency for clock tree actually, just wanted to provide the info that these GCC changes are for the newly defined SoC in the given series link. I will drop the dependency tag in the next series. Thanks, Imran