From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Robert Marko <robimarko@gmail.com>,
agross@kernel.org, bjorn.andersson@linaro.org,
konrad.dybcio@somainline.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: ipq8074: add reset to SDHCI
Date: Mon, 4 Jul 2022 14:29:27 +0200 [thread overview]
Message-ID: <7cb6fd46-ac80-fbc5-67f7-920934bb801c@linaro.org> (raw)
In-Reply-To: <20220704114430.625365-1-robimarko@gmail.com>
On 04/07/2022 13:44, Robert Marko wrote:
> Add reset to SDHCI controller so it can be reset to avoid timeout issues
> after software reset due to bootloader set configuration.
>
> Signed-off-by: Robert Marko <robimarko@gmail.com>
> ---
> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index ddafc7de6c5f..d685ca1969a3 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -482,6 +482,7 @@ sdhc_1: mmc@7824900 {
> <&gcc GCC_SDCC1_APPS_CLK>,
> <&xo>;
> clock-names = "iface", "core", "xo";
> + resets = <&gcc GCC_SDCC1_BCR>;
I looked at the bindings and they do not allow reset property, so does
it depend on anything?
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-07-04 12:29 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-04 11:44 [PATCH] arm64: dts: ipq8074: add reset to SDHCI Robert Marko
2022-07-04 12:29 ` Krzysztof Kozlowski [this message]
2022-07-04 12:34 ` Robert Marko
2022-07-04 13:56 ` Krzysztof Kozlowski
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