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[83.9.29.77]) by smtp.gmail.com with ESMTPSA id e18-20020ac25472000000b004f4589808cfsm775616lfn.300.2023.05.26.13.49.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 May 2023 13:49:20 -0700 (PDT) Message-ID: <7db82f55-72a5-bdd6-ff87-34aefa624602@linaro.org> Date: Fri, 26 May 2023 22:49:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v8 07/11] arm64: dts: qcom: sm6115: Add Crypto Engine support Content-Language: en-US To: Bhupesh Sharma , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: agross@kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, andersson@kernel.org, bhupesh.linux@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, vladimir.zapolskiy@linaro.org, rfoss@kernel.org, neil.armstrong@linaro.org, djakov@kernel.org, stephan@gerhold.net, Anders Roxell , Linux Kernel Functional Testing References: <20230526192210.3146896-1-bhupesh.sharma@linaro.org> <20230526192210.3146896-8-bhupesh.sharma@linaro.org> From: Konrad Dybcio In-Reply-To: <20230526192210.3146896-8-bhupesh.sharma@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 26.05.2023 21:22, Bhupesh Sharma wrote: > Add crypto engine (CE) and CE BAM related nodes and definitions to > 'sm6115.dtsi'. > > Reviewed-by: Konrad Dybcio > Tested-by: Konrad Dybcio > Tested-by: Anders Roxell > Tested-by: Linux Kernel Functional Testing > Signed-off-by: Bhupesh Sharma > --- > arch/arm64/boot/dts/qcom/sm6115.dtsi | 31 ++++++++++++++++++++++++++++ > 1 file changed, 31 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 43f31c1b9d5a..2aa148340277 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -663,6 +663,37 @@ usb_hsphy: phy@1613000 { > status = "disabled"; > }; > > + cryptobam: dma-controller@1b04000 { > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > + reg = <0x0 0x01b04000 0x0 0x24000>; > + interrupts = ; > + clocks = <&rpmcc RPM_SMD_CE1_CLK>; > + clock-names = "bam_clk"; > + #dma-cells = <1>; > + qcom,ee = <0>; > + qcom,controlled-remotely; > + iommus = <&apps_smmu 0x92 0>, > + <&apps_smmu 0x94 0x11>, > + <&apps_smmu 0x96 0x11>, > + <&apps_smmu 0x98 0x1>, > + <&apps_smmu 0x9F 0>; > + }; > + > + crypto: crypto@1b3a000 { > + compatible = "qcom,sm6115-qce", "qcom,ipq4019-qce", "qcom,qce"; > + reg = <0x0 0x01b3a000 0x0 0x6000>; > + clocks = <&rpmcc RPM_SMD_CE1_CLK>; > + clock-names = "core"; > + > + dmas = <&cryptobam 6>, <&cryptobam 7>; > + dma-names = "rx", "tx"; > + iommus = <&apps_smmu 0x92 0>, > + <&apps_smmu 0x94 0x11>, > + <&apps_smmu 0x96 0x11>, > + <&apps_smmu 0x98 0x1>, > + <&apps_smmu 0x9F 0>; Nit: masks should be hex (0 -> 0x0) and the 0x9F could be lowercase Konrad > + }; > + > qfprom@1b40000 { > compatible = "qcom,sm6115-qfprom", "qcom,qfprom"; > reg = <0x0 0x01b40000 0x0 0x7000>;