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Tue, 27 Oct 2026 05:01:02 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b4459713f9sm4988292a12.16.2026.10.27.05.00.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2026 05:01:00 -0700 (PDT) Message-ID: <7e4763a9-31f4-44cd-b3df-3404725a6dcc@oss.qualcomm.com> Date: Tue, 27 Oct 2026 13:00:57 +0100 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] arm64: dts: qcom: nord: Add display subsystem nodes To: Shawn Guo , Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Taniya Das , Ritesh Kumar , Mahadevan P , Nabige Aala , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260920091930.2215803-1-shengchao.guo@oss.qualcomm.com> <20260920091930.2215803-2-shengchao.guo@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260920091930.2215803-2-shengchao.guo@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=RYwFmFtv c=1 sm=1 tr=0 ts=6ae09282 cx=c_pps a=5HAIKLe1ejAbszaTRHs9Ug==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=B70xErdyIbx__L-6yYgA:9 a=QEXdDO2ut3YA:10 a=gYDTvv6II1OnSo0itH1n:22 X-Proofpoint-GUID: VQPMAvDy9te5G48WKc_wXN7isXhlFDhD X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI3MDA0NyBTYWx0ZWRfX2YPsO26C0Ta4 xY6nPQG2P0tXZlWyPa9R5cj4hN+05K/1+OsSYlFed5+1o7cl2uyQgGUFzLWPMInyTqPOTKvx2VU IxQAJqS7vKD8/MJ62Fw3ysRM76Ef5zY= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI3MDA0NyBTYWx0ZWRfX/If3itnwXK65 yKp/jxizX76lGf/F/v3ajfGxzPrSQ5rmng/aqpEyr6x46GBHN9bRCyKgoF+gTk9iXBQ8BWmjMhI KWk8uPyBAbTjFOHKpIvW768jq3gZzRULUfg/MWjkOrpm8zFPm6EQIctB/wgFFYc04tGZwdVahyS 4KqzHMU7PmB1CSbPLTMJb18pcjloQvuNU/AMWNZ793BWADidcJnfZklyZPzAAskZj4B2NvZo6KE wdM7h30vl/tZG5GkllDZEOfUHt0mH+IhX54muMq+wNNDsEZFnwPcXZo7hBcyGKzjNQkFgDPeqUm X3ZYoE76G9rkf0L5SFOYsPpyklL8erRh92Um09V3S9kQHfaDaZhDZqGWd4pY7vhn39cgoxP0EUj ap+WmcL5EuQyFk1fw+X76b3Pq0OUtxvfy1hSEQgBvUzBC/kB5GxFymud0qXR6otDY2u7fMzqS6E bhPfGT3P8x8+3ulH79g== X-Proofpoint-ORIG-GUID: VQPMAvDy9te5G48WKc_wXN7isXhlFDhD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-27_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 bulkscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610270047 On 9/20/26 11:19 AM, Shawn Guo wrote: > From: Ritesh Kumar > > Add the MDSS, DPU, DP controller and eDP PHY nodes for the Qualcomm Nord > SoC. Nord has two independent display subsystems, MDSS0 at 0xae00000 and > MDSS1 at 0x8c00000, each with two DP controllers and two eDP PHYs. Nord > is DP-only, so no DSI nodes are added. Wire the DP PHY outputs into the > dispcc0 and dispcc1 clock inputs, which were previously stubbed with > zeroes, and add the eDP0-3 hot-plug-detect pinctrl states. [...] > + dp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-162000000 { > + opp-hz = /bits/ 64 <162000000>; > + > + required-opps = <&rpmhpd_opp_low_svs>; Odd \n above Identical OPP tables can be reused (both across DPs and MDPs) [...] > + /* Display subsystem nodes - MDSS 12.1, DP-only (no DSI) */ Both of these comments can go Konrad