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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: PrLYwVo_6VuNjCXEBiMe4i64rtFOwJGc X-Authority-Analysis: v=2.4 cv=J4s/fwnS c=1 sm=1 tr=0 ts=6ab3ae05 cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=C3SnZ9t20SSjsJMBzhEA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIzMDA0MiBTYWx0ZWRfX3rWJBHyVyovb AAgRzv5wdjZyxuJCollNhlEsz9pCA0BaQf748EnYXDrBHzRUKgxAmACIMBEUiSpzM0JslAwevEO XbbhuBxya+c3PQL4/bfNqqZWNV5X0RPP9NUfoR4r0K522+TRt85iweFU/nyx/OBdJmN0V2oq3d4 38eIXFwkR+U1/Aq6t0GCBUq4RErORzNZfKS5m4gCHRsQqKEoPE7Gvk+QS4Hr084b/j7lHozUGQ8 pSXp1pZUUDatPCn1CIzwuvMVzOj1S9GateilHusMBz8L3w/MbQBXaziDM1LXkkO31hHdsDEwISX KrMJREsE0sLpDriGeLvKHDR4y8SVJgITRlV6muqOxkVhX9h4tGkmkZ7rs1XI1tNLVrA9PgbPkfW QCA+7+vckAJ0zrV6mtGd2IU8gzoOqSgupXsY9BOdGEaiBsY9oePwAByBHziksWUOEEGVLe8CM6x YG3ES6RtnyZfWGuP4jw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIzMDA0MiBTYWx0ZWRfX4MeX8KQdp6iz rFqpxTfTUUyTwpacOKd+uciqzao2Eto/EyhUz6pyQSJSf/Zv9s4YdvXSXnbJmwZMsgLRdmNPzm0 19Vg+NMPkyPuUtYzEw9b4Sh9cAVN4pU= X-Proofpoint-GUID: PrLYwVo_6VuNjCXEBiMe4i64rtFOwJGc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-23_04,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 spamscore=0 impostorscore=0 priorityscore=1501 phishscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609230042 Hi Dmitry, On 9/22/2026 9:33 PM, Dmitry Baryshkov wrote: > On Wed, Sep 16, 2026 at 02:41:20PM +0530, Nabige Aala wrote: >> From: Arpit Saini >> >> Enable the Shikra MDSS display subsystem on the Qualcomm >> Shikra CQM EVK board and add the DLC0697 MIPI DSI display >> panel node. Pin pm4125_l5 to 1.232V with regulator-allow-set-load >> for DSI PHY PLL stability. >> >> Signed-off-by: Arpit Saini >> Signed-off-by: Nabige Aala >> --- >> arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts | 118 ++++++++++++++++++++++++++++ >> 1 file changed, 118 insertions(+) >> >> + >> +&mdss_dsi0 { >> + vdda-supply = <&pm4125_l5>; >> + >> + status = "okay"; >> + >> + panel@0 { >> + compatible = "dlc,dlc0697", "ilitek,ili7807s"; >> + reg = <0>; >> + >> + reset-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; >> + >> + vddi-supply = <&pm4125_l15>; >> + avdd-supply = <&vreg_disp_p>; >> + avee-supply = <&vreg_disp_n>; >> + >> + pinctrl-0 = <&panel_rst_n &panel_te_pin &panel_bl_en>; > > As far as I remember, your panel_bl_en enables an external regulator. > Why is it not described in this way? > panel_bl_en is a Qcom's daughter card specific platform signal , it does not feed into the panel. It is a board-level GPIO on the CQM EVK daughter card used purely for platform power sequencing. Adding panel_bl_en as an external regulator would be misleading and incorrect from a hardware perspective, as it is not directly going into the panel. for the CQM EVK, the backlight is MIPI DCS driven and panel_bl_en is a platform-specific sequencing pin, making pinctrl states the appropriate binding here. Could you please take a look at earlier discussion we had and let us know your thoughts ? https://lore.kernel.org/all/29ca6303-4368-4aeb-b82f-039aa252780a@oss.qualcomm.com/ Thanks, Arpit