From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Michal Simek <michal.simek@xilinx.com>,
Adrian Hunter <adrian.hunter@intel.com>
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, git@amd.com,
saikrishna12468@gmail.com
Subject: Re: [PATCH] dt bindings: mmc: arasan,sdci: Add gate property for Xilinx platforms
Date: Fri, 10 Nov 2023 13:22:59 +0100 [thread overview]
Message-ID: <7f02301c-17dd-415b-a5c0-7bebf8721a55@linaro.org> (raw)
In-Reply-To: <20231110081105.3295037-1-sai.krishna.potthuri@amd.com>
On 10/11/2023 09:11, Sai Krishna Potthuri wrote:
> From: Swati Agarwal <swati.agarwal@amd.com>
>
Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.
It's: dt-bindings
> Add gate property in example node for Xilinx platforms which will be used
> to ungate the DLL clock. DLL clock is required for higher frequencies like
> 50MHz, 100MHz and 200MHz.
> DLL clock is automatically selected by the SD controller when the SD
> output clock frequency is more than 25 MHz.
>
> Signed-off-by: Swati Agarwal <swati.agarwal@amd.com>
> Co-developed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> ---
> Note: This patch only updates the example nodes with the gate property for
> Xilinx platforms.
>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
prev parent reply other threads:[~2023-11-10 12:23 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-10 8:11 [PATCH] dt bindings: mmc: arasan,sdci: Add gate property for Xilinx platforms Sai Krishna Potthuri
2023-11-10 12:22 ` Krzysztof Kozlowski [this message]
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