From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
lpieralisi@kernel.org, robh@kernel.org, andersson@kernel.org
Cc: kw@linux.com, bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
konrad.dybcio@somainline.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, devicetree@vger.kernel.org,
dmitry.baryshkov@linaro.org
Subject: Re: [PATCH v3 10/12] dt-bindings: PCI: qcom-ep: Define clocks per platform
Date: Sun, 11 Sep 2022 15:38:54 +0200 [thread overview]
Message-ID: <7f132784-a324-c9d0-f22b-1d18ef1894ce@linaro.org> (raw)
In-Reply-To: <20220910063045.16648-11-manivannan.sadhasivam@linaro.org>
On 10/09/2022 08:30, Manivannan Sadhasivam wrote:
> In preparation of adding the bindings for future SoCs, let's define the
> clocks per platform.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-09-11 13:39 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-10 6:30 [PATCH v3 00/12] Improvements to the Qcom PCIe Endpoint driver Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 01/12] PCI: qcom-ep: Add kernel-doc for qcom_pcie_ep structure Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 02/12] PCI: qcom-ep: Do not use hardcoded clks in driver Manivannan Sadhasivam
2022-09-13 20:12 ` Bjorn Helgaas
2022-09-14 6:05 ` Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 03/12] PCI: qcom-ep: Make use of the cached dev pointer Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 04/12] PCI: qcom-ep: Disable IRQs during driver remove Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 05/12] PCI: qcom-ep: Expose link transition counts via debugfs Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 06/12] PCI: qcom-ep: Gate Master AXI clock to MHI bus during L1SS Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 07/12] PCI: qcom-ep: Disable Master AXI Clock when there is no PCIe traffic Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 08/12] dt-bindings: PCI: qcom-ep: Make PERST separation optional Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 09/12] " Manivannan Sadhasivam
2022-09-10 6:30 ` [PATCH v3 10/12] dt-bindings: PCI: qcom-ep: Define clocks per platform Manivannan Sadhasivam
2022-09-11 13:38 ` Krzysztof Kozlowski [this message]
2022-09-10 6:30 ` [PATCH v3 11/12] dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC Manivannan Sadhasivam
2022-09-10 14:53 ` Rob Herring
2022-09-11 13:45 ` Krzysztof Kozlowski
2022-09-13 14:44 ` Rob Herring
2022-09-10 6:30 ` [PATCH v3 12/12] " Manivannan Sadhasivam
2022-09-13 16:44 ` [PATCH v3 00/12] Improvements to the Qcom PCIe Endpoint driver Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7f132784-a324-c9d0-f22b-1d18ef1894ce@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=dmitry.baryshkov@linaro.org \
--cc=konrad.dybcio@somainline.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=robh+dt@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).