From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AD45C4167D for ; Wed, 23 Nov 2022 14:13:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238063AbiKWONb (ORCPT ); Wed, 23 Nov 2022 09:13:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236038AbiKWON2 (ORCPT ); Wed, 23 Nov 2022 09:13:28 -0500 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90DCA2D74E for ; Wed, 23 Nov 2022 06:13:26 -0800 (PST) Received: by mail-lf1-x12b.google.com with SMTP id r12so28383841lfp.1 for ; Wed, 23 Nov 2022 06:13:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=8/Gp8oNJZw3cLXUYP8ks4PwvnFzrrxOR4KiPfsrpS5s=; b=Eu4w0mKIlQN/48m6aFJ+zpEBptQk93sPQh9M8czvaTGBgj/obNFUppnhII4bHaL+t8 WDRLzC/3Bq9UVwLtv7GnkM96heFTdJivk2h6ne0AJWun7grt5tlGRIkzjFdSsrMuxmm9 fOEoOPvp1SOx/oesbnKiK5xb2kGivh5DafLvQPvRzONO+0HYgfFbCsn5INIWAqht3SWV XGyvUJUdga+HZqaWOemqlq7N/FMRO9J5Gswx85kxcWL5ADEik4+K0/FZgRLrjRPkD6Cx EIDe//PF9Abt7YL/j3jqsSf12pvXQUFX1J8fSacwR2zK+LGdDdBoE3fd3uPb87puxjNj KbKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=8/Gp8oNJZw3cLXUYP8ks4PwvnFzrrxOR4KiPfsrpS5s=; b=UDz27ASfS1ifGRe+7ehuH+USeechGzbkE4Z76eP9TcBpPPeBpcWVQ897QjWD2YwRB4 UvqpfJnijTVofNk1gt4WNZ7VgYJJPk5lijQhgQjjEF6EyO3+KSyjiSAx7QLXBqyEQhlZ LvqOWNiIchyC0edSGb4rfTdnxDf2osbxR3TQKbk6PkCm+Cys4h0SjSACfaZsjRCi6Tt2 BC0esAoqXeVONAGm2Qm1fpdelXnHyyy5zOafjKSHK/f1ghLrN+Sah7xnSF6tI6GUrXuN eyfiqEv/6wOQ4uFe2wEQ0mJ2JFjuZ/K4cfiWQgSj05KUDiOEjz+bHwZUC1YC0TzXOwGb cd5w== X-Gm-Message-State: ANoB5plzmUeguWYYVAKlMlqCptMwt9H84cQcyDsIJjifVgd6ZJ7ROKOg 38qFsCsf2f4j34Tg/LzK7/X4Ig== X-Google-Smtp-Source: AA0mqf5quQBr81TBL9QYOBAQk89wKtHmN891t6m5JcSES8bjEfXcUWIQE5L7V2X5rE6LA0yj51omnw== X-Received: by 2002:ac2:5f62:0:b0:4b4:6ca6:c669 with SMTP id c2-20020ac25f62000000b004b46ca6c669mr9176286lfc.338.1669212804830; Wed, 23 Nov 2022 06:13:24 -0800 (PST) Received: from [192.168.0.20] (088156142067.dynamic-2-waw-k-3-2-0.vectranet.pl. [88.156.142.67]) by smtp.gmail.com with ESMTPSA id 21-20020ac24835000000b004a2588520f5sm2893414lft.166.2022.11.23.06.13.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Nov 2022 06:13:24 -0800 (PST) Message-ID: <7f3a34a0-a5b0-3a72-8e0e-00656bd77ff6@linaro.org> Date: Wed, 23 Nov 2022 15:13:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH V5 4/4] arm64: dts: meson: add S4 Soc Peripheral clock controller in DT Content-Language: en-US To: neil.armstrong@linaro.org, Yu Tu , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Neil Armstrong , Jerome Brunet , Kevin Hilman , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Martin Blumenstingl Cc: kelvin.zhang@amlogic.com References: <20221123021346.18136-1-yu.tu@amlogic.com> <20221123021346.18136-5-yu.tu@amlogic.com> <9961d579-9463-c585-34a6-a3abcd4b3e52@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <9961d579-9463-c585-34a6-a3abcd4b3e52@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 23/11/2022 14:27, Neil Armstrong wrote: > On 23/11/2022 11:10, Krzysztof Kozlowski wrote: >> On 23/11/2022 03:13, Yu Tu wrote: >>> Added information about the S4 SOC Peripheral Clock controller in DT. >>> >>> Signed-off-by: Yu Tu >>> --- >>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 26 +++++++++++++++++++++++ >>> 1 file changed, 26 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> index bd9c2ef83314..e7fab6e400be 100644 >>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi >>> @@ -6,6 +6,8 @@ >>> #include >>> #include >>> #include >>> +#include >>> +#include >>> >>> / { >>> cpus { >>> @@ -100,6 +102,30 @@ clkc_pll: clock-controller@8000 { >>> #clock-cells = <1>; >>> }; >>> >>> + clkc_periphs: clock-controller { >>> + compatible = "amlogic,s4-peripherals-clkc"; >>> + reg = <0x0 0x0 0x0 0x49c>; >> >> This is broken... did you check for warnings? > > This is actually fine, the parent node has a ranges property: > https://github.com/torvalds/linux/blob/eb7081409f94a9a8608593d0fb63a1aa3d6f95d8/arch/arm64/boot/dts/amlogic/meson-s4.dtsi#L93 The parent ranges do not change here anything. You cannot have a reg without unit address and the tools report it. No need to use reviewers for this... Best regards, Krzysztof