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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC Content-Language: en-US To: William Qiu , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Linus Walleij References: <20230704092200.85401-1-william.qiu@starfivetech.com> <20230704092200.85401-3-william.qiu@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20230704092200.85401-3-william.qiu@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 04/07/2023 11:22, William Qiu wrote: > Add spi node for JH7110 SoC. > > Co-developed-by: Xingyu Wu Missing SoB. > Signed-off-by: William Qiu > --- > .../jh7110-starfive-visionfive-2.dtsi | 52 ++++++++++ > arch/riscv/boot/dts/starfive/jh7110.dtsi | 98 +++++++++++++++++++ > 2 files changed, 150 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > index 2a6d81609284..a066d2e399c4 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -126,6 +126,20 @@ &i2c6 { > status = "okay"; > }; > > +&spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins>; > + status = "okay"; > + > + spi_dev0: spi@0 { > + compatible = "st,m25p80"; > + pl022,com-mode = <1>; > + spi-max-frequency = <10000000>; > + reg = <0>; reg is always following compatible, not somewhere deep in properties. > + status = "okay"; okay is by default > + }; > +}; Best regards, Krzysztof