From: Krzysztof Kozlowski <krzk@kernel.org>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
Ryan Wanner <ryan.wanner@microchip.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Subject: Re: [PATCH v2 08/16] dt-bindings: nvmem: microchip-otpc: Add required clocks
Date: Tue, 11 Feb 2025 08:50:17 +0100 [thread overview]
Message-ID: <7fa40597-ebc8-495e-885f-ff2c6b80d5e7@kernel.org> (raw)
In-Reply-To: <20250211-primer-epic-d07bc3752569@thorsis.com>
On 11/02/2025 08:05, Alexander Dahl wrote:
> Hello Krzysztof,
>
> Am Mon, Feb 10, 2025 at 05:59:52PM +0100 schrieb Krzysztof Kozlowski:
>> On 10/02/2025 17:44, Alexander Dahl wrote:
>>> The OTPC requires both the peripheral clock through PMC and the main RC
>>> oscillator. Seemed to work without explicitly enabling those clocks on
>>> sama7g5 before, but did not on sam9x60.
>>>
>>> Older datasheets were not clear and explicit about this, but recent are,
>>> e.g. SAMA7G5 series datasheet (DS60001765B),
>>> section 30.4.1 Power Management:
>>>
>>>> The OTPC is clocked through the Power Management Controller (PMC).
>>>> The user must power on the main RC oscillator and enable the
>>>> peripheral clock of the OTPC prior to reading or writing the OTP
>>>> memory.
>>>
>>> Link: https://lore.kernel.org/linux-clk/ec34efc2-2051-4b8a-b5d8-6e2fd5e08c28@microchip.com/T/#u
>>> Signed-off-by: Alexander Dahl <ada@thorsis.com>
>>> ---
>>>
>>> Notes:
>>> v2:
>>> - new patch, not present in v1
>>>
>>> .../nvmem/microchip,sama7g5-otpc.yaml | 28 +++++++++++++++++++
>>> 1 file changed, 28 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>>> index 9a7aaf64eef32..1fa40610888f3 100644
>>> --- a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>>> +++ b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
>>> @@ -29,6 +29,16 @@ properties:
>>> reg:
>>> maxItems: 1
>>>
>>> + clocks:
>>> + items:
>>> + - description: main rc oscillator
>>> + - description: otpc peripheral clock
>>> +
>>> + clock-names:
>>> + items:
>>> + - const: main_rc_osc
>>
>> osc
>
> On at91 SoCs main oscillator and main RC oscillator are two different
> things, and those are different clocks in Linux as well. This clock
> is named "main_rc_osc" in the clock driver. In
It does not matter, you could have 5 oscillators. This device takes one.
What is this clock from the point of view of device?
> drivers/clk/at91/sam9x60.c this clock is added like this:
>
> hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000, 50000000);
>
> The datasheet makes it explicit, it's exactly the main rc oscillator
> clock required for the OTPC to work, no other clock.
You speak about source clock but this has to be the clock here, in the
device context.
>
> So why name this "osc" only then? This is confusing at best.
>
>>
>>> + - const: otpc_clk
>>
>> otpc or bus or whatever logically this is
>
> Okay the "_clk" suffix is redundant. Since the peripheral clock for
> the OTPC is required here, I would go with "otpc" only then.
>
>>
>>> +
>>> required:
>>> - compatible
>>> - reg
>>> @@ -37,6 +47,8 @@ unevaluatedProperties: false
>>>
>>> examples:
>>> - |
>>> + #include <dt-bindings/clock/at91.h>
>>> + #include <dt-bindings/clock/microchip,sama7g5-pmc.h>
>>> #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
>>>
>>> otpc: efuse@e8c00000 {
>>> @@ -44,10 +56,26 @@ examples:
>>> reg = <0xe8c00000 0xec>;
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> + clocks = <&pmc PMC_TYPE_CORE SAMA7G5_PMC_MAIN_RC>, <&pmc PMC_TYPE_PERIPHERAL 67>;
>>> + clock-names = "main_rc_osc", "otpc_clk";
>>>
>>> temperature_calib: calib@1 {
>>> reg = <OTP_PKT(1) 76>;
>>> };
>>> };
>>>
>>> + - |
>>> + #include <dt-bindings/clock/at91.h>
>>> + #include <dt-bindings/clock/microchip,sam9x60-pmc.h>
>>> + #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
>>> +
>>> + efuse@eff00000 {
>>> + compatible = "microchip,sam9x60-otpc", "syscon";
>>> + reg = <0xeff00000 0xec>;
>>
>> No need for new example with difference in what exactly? Even compatible
>> was not added here...
>
> Different compatible, different clocks, no sub nodes, different
> peripheral clock id … From a human doc readers I'd like another
Clocks are the same. Their actual value does not matter.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-02-11 7:50 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 16:44 [PATCH v2 00/16] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 01/16] dt-bindings: clock: at91: Split up per SoC partially Alexander Dahl
2025-02-10 17:05 ` Krzysztof Kozlowski
2025-02-11 7:16 ` Alexander Dahl
2025-02-11 7:47 ` Krzysztof Kozlowski
2025-02-17 9:11 ` Claudiu Beznea
2025-02-17 9:47 ` Alexander Dahl
2025-02-19 8:51 ` Claudiu Beznea
2025-02-19 9:08 ` Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 02/16] ARM: dts: microchip: Use new PMC bindings Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 03/16] clk: at91: " Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 04/16] dt-bindings: clock: at91: Allow referencing main rc oscillator in DT Alexander Dahl
2025-02-10 17:07 ` Krzysztof Kozlowski
2025-02-11 7:26 ` Alexander Dahl
2025-02-11 8:01 ` Krzysztof Kozlowski
2025-02-10 16:44 ` [PATCH v2 05/16] clk: at91: Allow enabling main_rc_osc through DT Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 06/16] clk: at91: Add peripheral id for OTPC Alexander Dahl
2025-02-10 16:44 ` [PATCH v2 07/16] dt-bindings: nvmem: microchip-otpc: Add compatible for SAM9X60 Alexander Dahl
2025-02-12 9:13 ` Krzysztof Kozlowski
2025-02-10 16:44 ` [PATCH v2 08/16] dt-bindings: nvmem: microchip-otpc: Add required clocks Alexander Dahl
2025-02-10 16:59 ` Krzysztof Kozlowski
2025-02-11 7:05 ` Alexander Dahl
2025-02-11 7:50 ` Krzysztof Kozlowski [this message]
2025-02-10 16:50 ` [PATCH v2 09/16] nvmem: microchip-otpc: Avoid reading a write-only register Alexander Dahl
2025-02-11 6:47 ` Greg Kroah-Hartman
2025-02-17 9:10 ` Claudiu Beznea
2025-02-11 6:52 ` [PATCH v2 10/16] nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters Alexander Dahl
2025-02-11 6:52 ` [PATCH v2 11/16] nvmem: microchip-otpc: Add SAM9X60 support Alexander Dahl
2025-02-11 6:52 ` [PATCH v2 12/16] ARM: dts: microchip: sama7g5: Add OTPC clocks Alexander Dahl
2025-02-17 9:10 ` [PATCH v2 10/16] nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters Claudiu Beznea
2025-02-11 6:53 ` [PATCH v2 13/16] ARM: dts: microchip: sam9x60: Add OTPC node Alexander Dahl
2025-02-11 6:53 ` [PATCH v2 14/16] ARM: dts: microchip: sam9x60_curiosity: Enable OTP Controller Alexander Dahl
2025-02-11 6:53 ` [PATCH v2 15/16] nvmem: microchip-otpc: Enable necessary clocks Alexander Dahl
2025-02-17 9:10 ` Claudiu Beznea
2025-02-11 6:53 ` [PATCH v2 16/16] nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device Alexander Dahl
2025-02-17 9:10 ` [PATCH v2 13/16] ARM: dts: microchip: sam9x60: Add OTPC node Claudiu Beznea
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7fa40597-ebc8-495e-885f-ff2c6b80d5e7@kernel.org \
--to=krzk@kernel.org \
--cc=claudiu.beznea@tuxon.dev \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nicolas.ferre@microchip.com \
--cc=robh@kernel.org \
--cc=ryan.wanner@microchip.com \
--cc=srinivas.kandagatla@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).