From: Kevin Hilman <khilman@baylibre.com>
To: Yixun Lan <yixun.lan@amlogic.com>
Cc: Carlo Caione <carlo@caione.org>, Rob Herring <robh@kernel.org>,
Qiufang Dai <qiufang.dai@amlogic.com>,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk
Date: Fri, 27 Apr 2018 12:03:26 -0700 [thread overview]
Message-ID: <7hmuxo1ngh.fsf@baylibre.com> (raw)
In-Reply-To: <20180328030130.240336-3-yixun.lan@amlogic.com> (Yixun Lan's message of "Wed, 28 Mar 2018 11:01:29 +0800")
Yixun Lan <yixun.lan@amlogic.com> writes:
> The ao_clk81 in AO domain have two clock source,
> one from a 32K alt crystal we name it as ao_alt_clk,
> another is the clk81 signal from EE domain.
>
> Acked-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
As this one is a stanadlone, I've applied it to v4.18/dt64,
Thanks,
Kevin
> ---
> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index b0eff7d7f771..40ca49fb94a6 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -108,6 +108,13 @@
> #clock-cells = <0>;
> };
>
> + ao_alt_xtal: ao_alt_xtal-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <32000000>;
> + clock-output-names = "ao_alt_xtal";
> + #clock-cells = <0>;
> + };
> +
> soc {
> compatible = "simple-bus";
> #address-cells = <2>;
next prev parent reply other threads:[~2018-04-27 19:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-28 3:01 [PATCH v3 0/3] ARM64: dts: meson-axg: add AO clock driver Yixun Lan
2018-03-28 3:01 ` [PATCH v3 1/3] arm64: dts: meson-axg: add AO clock driver DT info Yixun Lan
2018-03-29 8:59 ` kbuild test robot
2018-03-28 3:01 ` [PATCH v3 2/3] ARM64: dts: meson-axg: add an 32K alt aoclk Yixun Lan
2018-04-27 19:03 ` Kevin Hilman [this message]
2018-03-28 3:01 ` [PATCH v3 3/3] ARM64: dts: meson: fix clock source of the pclk for UART_AO Yixun Lan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7hmuxo1ngh.fsf@baylibre.com \
--to=khilman@baylibre.com \
--cc=carlo@caione.org \
--cc=devicetree@vger.kernel.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=qiufang.dai@amlogic.com \
--cc=robh@kernel.org \
--cc=yixun.lan@amlogic.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).