From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	agross@kernel.org
Cc: andersson@kernel.org, konrad.dybcio@linaro.org, joro@8bytes.org,
	will@kernel.org, robin.murphy@arm.com, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, robdclark@gmail.com,
	linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	marijn.suijten@somainline.org, kernel@collabora.com,
	luca@z3ntu.xyz, a39.skl@gmail.com, phone-devel@vger.kernel.org,
	~postmarketos/upstreaming@lists.sr.ht
Subject: Re: [PATCH v3 4/6] iommu/qcom: Index contexts by asid number to allow asid 0
Date: Tue, 7 Mar 2023 18:53:21 +0200	[thread overview]
Message-ID: <8093d73c-aa26-65b0-529a-c7b482b315cb@linaro.org> (raw)
In-Reply-To: <20221115101122.155440-5-angelogioacchino.delregno@collabora.com>
On 15/11/2022 12:11, AngeloGioacchino Del Regno wrote:
> This driver was indexing the contexts by asid-1, which is probably
> done under the assumption that the first ASID is always 1.
> 
> Unfortunately this is not always true: at least for MSM8956 and
> MSM8976's GPU IOMMU, the gpu_user context's ASID number is zero.
> To allow using a zero asid number, index the contexts by `asid`
> instead of by `asid - 1`.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> [Marijn: Rebased over next-20221111]
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>   drivers/iommu/arm/arm-smmu/qcom_iommu.c | 24 ++++++++++++------------
>   1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> index 49f4308f1bd2..94f51cafee17 100644
> --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
> @@ -52,7 +52,7 @@ struct qcom_iommu_dev {
>   	void __iomem		*local_base;
>   	u32			 sec_id;
>   	u8			 num_ctxs;
> -	struct qcom_iommu_ctx	*ctxs[];   /* indexed by asid-1 */
> +	struct qcom_iommu_ctx	*ctxs[];   /* indexed by asid */
>   };
>   
>   struct qcom_iommu_ctx {
> @@ -94,7 +94,7 @@ static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid
>   	struct qcom_iommu_dev *qcom_iommu = d->iommu;
>   	if (!qcom_iommu)
>   		return NULL;
> -	return qcom_iommu->ctxs[asid - 1];
> +	return qcom_iommu->ctxs[asid];
>   }
>   
>   static inline void
> @@ -563,12 +563,10 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
>   	qcom_iommu = platform_get_drvdata(iommu_pdev);
>   
>   	/* make sure the asid specified in dt is valid, so we don't have
> -	 * to sanity check this elsewhere, since 'asid - 1' is used to
> -	 * index into qcom_iommu->ctxs:
> +	 * to sanity check this elsewhere:
>   	 */
> -	if (WARN_ON(asid < 1) ||
> -	    WARN_ON(asid > qcom_iommu->num_ctxs) ||
> -	    WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL)) {
> +	if (WARN_ON(asid >= qcom_iommu->num_ctxs) ||
Could you please change qcom_iommu to store max_asid rather than 
num_ctxs. This piece becomes logical then.
Looks good to me otherwise.
> +	    WARN_ON(qcom_iommu->ctxs[asid] == NULL)) {
>   		put_device(&iommu_pdev->dev);
>   		return -EINVAL;
>   	}
> @@ -726,7 +724,7 @@ static int qcom_iommu_ctx_probe(struct platform_device *pdev)
>   
>   	dev_dbg(dev, "found asid %u\n", ctx->asid);
>   
> -	qcom_iommu->ctxs[ctx->asid - 1] = ctx;
> +	qcom_iommu->ctxs[ctx->asid] = ctx;
>   
>   	return 0;
>   }
> @@ -738,7 +736,7 @@ static int qcom_iommu_ctx_remove(struct platform_device *pdev)
>   
>   	platform_set_drvdata(pdev, NULL);
>   
> -	qcom_iommu->ctxs[ctx->asid - 1] = NULL;
> +	qcom_iommu->ctxs[ctx->asid] = NULL;
>   
>   	return 0;
>   }
> @@ -779,7 +777,7 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
>   	struct device *dev = &pdev->dev;
>   	struct resource *res;
>   	struct clk *clk;
> -	int ret, max_asid = 0;
> +	int ret, num_ctxs, max_asid = 0;
>   
>   	/* find the max asid (which is 1:1 to ctx bank idx), so we know how
>   	 * many child ctx devices we have:
> @@ -787,11 +785,13 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
>   	for_each_child_of_node(dev->of_node, child)
>   		max_asid = max(max_asid, get_asid(child));
>   
> -	qcom_iommu = devm_kzalloc(dev, struct_size(qcom_iommu, ctxs, max_asid),
> +	num_ctxs = max_asid + 1;
> +
> +	qcom_iommu = devm_kzalloc(dev, struct_size(qcom_iommu, ctxs, num_ctxs),
>   				  GFP_KERNEL);
>   	if (!qcom_iommu)
>   		return -ENOMEM;
> -	qcom_iommu->num_ctxs = max_asid;
> +	qcom_iommu->num_ctxs = num_ctxs;
>   	qcom_iommu->dev = dev;
>   
>   	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- 
With best wishes
Dmitry
next prev parent reply	other threads:[~2023-03-07 16:57 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-15 10:11 [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 1/6] dt-bindings: iommu: qcom,iommu: Document qcom,ctx-num property AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 2/6] iommu/qcom: Use the asid read from device-tree if specified AngeloGioacchino Del Regno
2023-03-07 16:44   ` Dmitry Baryshkov
2023-03-07 16:47     ` Konrad Dybcio
2023-06-20  9:43     ` AngeloGioacchino Del Regno
2022-11-15 10:11 ` [PATCH v3 3/6] iommu/qcom: Properly reset the IOMMU context AngeloGioacchino Del Regno
2023-03-07 16:50   ` Dmitry Baryshkov
2022-11-15 10:11 ` [PATCH v3 4/6] iommu/qcom: Index contexts by asid number to allow asid 0 AngeloGioacchino Del Regno
2023-03-07 16:53   ` Dmitry Baryshkov [this message]
2022-11-15 10:11 ` [PATCH v3 5/6] dt-bindings: iommu: qcom,iommu: Document QSMMUv2 and MSM8976 compatibles AngeloGioacchino Del Regno
2022-11-16 12:22   ` Krzysztof Kozlowski
2022-11-15 10:11 ` [PATCH v3 6/6] iommu/qcom: Add support for QSMMUv2 and QSMMU-500 secured contexts AngeloGioacchino Del Regno
2023-03-07 16:58   ` Dmitry Baryshkov
2023-02-22  9:57 ` [PATCH v3 0/6] Add support for Qualcomm's legacy IOMMU v2 AngeloGioacchino Del Regno
2023-06-19 21:42   ` Luca Weiss
2023-06-20 10:02     ` AngeloGioacchino Del Regno
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