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Sun, 15 Jun 2025 09:00:05 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3826.600.51.1.1\)) Subject: Re: [PATCH 1/4] arm64: dts: rockchip: list all CPU supplies on ArmSoM Sige5 From: Piotr Oniszczuk In-Reply-To: Date: Sun, 15 Jun 2025 17:59:54 +0200 Cc: Nicolas Frattaroli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Message-Id: <80ACAAAE-F522-4199-9048-ADE69F6E1128@gmail.com> References: <20250603-sige5-updates-v1-0-717e8ce4ab77@gmail.com> <20250603-sige5-updates-v1-1-717e8ce4ab77@gmail.com> <6656934.DvuYhMxLoT@workhorse> <512E950E-E8CB-443B-8E47-79F073D217E8@gmail.com> <90218D7B-0CF5-4F5D-969A-909A44E6044F@gmail.com> To: Alexey Charkov X-Mailer: Apple Mail (2.3826.600.51.1.1) > Wiadomo=C5=9B=C4=87 napisana przez Alexey Charkov = w dniu 9 cze 2025, o godz. 16:05: >=20 > On Sun, Jun 8, 2025 at 11:24=E2=80=AFAM Piotr Oniszczuk > wrote: >>> Wiadomo=C5=9B=C4=87 napisana przez Alexey Charkov = w dniu 5 cze 2025, o godz. 15:42: >>>> Alexey, >>>> I see you are using rk3576 board like me (nanopi-m5) >>>> Have you on your board correctly working cpu dvfs? >>>> I mean: [1][desired clocks reported by kernel sysfs are in pair = with [2[]cur clocks? >>>> In my case i see mine cpu lives totally on it=E2=80=99s own with = dvfs: >>>=20 >>> Hi Piotr, >>>=20 >>> I haven't tried to validate actual running frequencies vs. requested >>> frequencies, but subjective performance and power consumption seem = to >>> be in line with what I expect. >>=20 >> well - my subjective l&f is that - currently - my rk3576 seems = =E2=80=9Eslower" than i.e. 4xA53 h618. >=20 > In my experience, native compilation of GCC 14 using 8 threads on > RK3576 (mainline with passive cooling and throttling enabled): 2 hours > 6 minutes, on RK3588 (mainline with passive cooling via Radxa Rock 5B > case and throttling enabled but never kicking in): 1 hour 10 minutes by curiosity i looked randomly on 3576 vs 3588: multithread passmark: 3675 = (https://www.cpubenchmark.net/cpu.php?cpu=3DRockchip+RK3576&id=3D6213) multithread passmark: 4530 = (https://www.cpubenchmark.net/cpu.php?cpu=3DRockchip+RK3588&id=3D4906) assuming 3588 as baseline, 3576 is approx 20% slower on multithread = passmark (has ~0,8 comp power of 3588) 70 min compile on 3588 should take something like ~86min on 3576. In your case 126min compile on 3576 shows 3576 offers 0,55 comp power of = 3588. Roughly 3576 should do this task in 40min less than you currently see i = think =20 > Can't see how u-boot would affect CPU speed in Linux, as long as you > use comparable ATF images. Do you use the same kernel and dtb in all > these cases? Also, what's your thermal setup? yes. in all cases only change was: uboot & atf thermal is based on recent collabora series (+ recent pooling fix for = clocks return from throttling)=20 >=20 >=20 > Not sure UX is a particularly good measure of CPU performance, as long > as you've got a properly accelerated DRM graphics pipeline. More > likely 2D/3D and memory. indeed. For quantified look i=E2=80=99m looking on v.simple approach to estimate = real clock is http://uob-hpc.github.io/2017/11/22/arm-clock-freq.html by curiosity i looked what it reports on a53/a55/a72/a76 and it is = surprisingly accurate :-) on mine 3576 with collabora uboot+mainline atf is hows 800MHz (and in = perf. gov it seems to be constant) >=20 > There might be some difference in how PVTPLL behaves on RK3576 vs. > RK3588. But frankly first I would check if you are using comparable > ATF implementations (e.g. upstream TF-A in both cases), kernels and > thermal environment :) =20 all tests: the same 6.15.2 mainline + some collabora patches diffs were:=20 1.collabora uboot[1] + mainline atf 2.13 2.collabora uboot[1] + rockchip rkbin bl31 blob 3.vendor uboot (bin dump from friendlyelec ubuntu image) =20 on 1/2 i see kind of issue with clock values (i.e. perf gov gives = constant 800MHz on mainline atf). 3 seems to perform better - (i.e. perf gov gives constant 1500MHz so all = is snappier/faster)=20 as pvtpll is trying to reach target freq and ends with stable oper. freq = for given cpu_vdd/temp/fab.cut - possible theory is: if cpu_vdd is = wrongly driven, pvtpll programmed freq will way diff from req. (i.e. way = too low). monitoring vdd_big/vdd_lit shows constant 950mv for perf.gov (read from = sysfs; not verified with multimeter as i don=E2=80=99t have pcb pdf with = components layout so can=E2=80=99t identify i.e. vdd_big filtering caps = c1007/c1008 to measure) (.dxf file provided by friendlyelec [1] seems to be lacking comp. = numbering) =20 [1]: = https://wiki.friendlyelec.com/wiki/images/e/e1/NanoPi_M5_2411_DXF.zip