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Thu, 01 Oct 2026 05:47:02 -0700 (PDT) X-Received: by 2002:a17:90a:da8b:b0:3a0:9c9d:eb18 with SMTP id 98e67ed59e1d1-3a4d1937974mr4107770a91.54.1790858822309; Thu, 01 Oct 2026 05:47:02 -0700 (PDT) Received: from [10.219.49.187] ([202.46.23.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a4f44f5299sm4397752a91.17.2026.10.01.05.46.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Oct 2026 05:47:01 -0700 (PDT) Message-ID: <81587936-75f4-4e6c-aeda-176799df3a33@oss.qualcomm.com> Date: Thu, 1 Oct 2026 18:16:56 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 7/8] ASoC: qcom: lpass-tx-macro: Add support for Bolero v4.0 To: Ajay Kumar Nandam , Mohammad Rafi Shaik , Srinivas Kandagatla , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sarath Ganapathiraju References: <20260922-add_shikra_support-v1-0-6c6cb6444caf@oss.qualcomm.com> <20260922-add_shikra_support-v1-7-6c6cb6444caf@oss.qualcomm.com> <2c37b9fa-9810-482d-8ca3-67072a0f9072@oss.qualcomm.com> Content-Language: en-US From: Prasad Kumpatla In-Reply-To: <2c37b9fa-9810-482d-8ca3-67072a0f9072@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAxMDA1MCBTYWx0ZWRfX6Svn9+znVRln imgTsIRNfrO8x453PFkEHHLsk477BHb8n2+YB08uKhSFMkVUWx5FUiUDnJNH7Nvntmlj0m8BfMJ KfB2Am7l2STRV4Qgq/oadibGquukeZ0ChqZjEuC80OMoni19HYmKVPzFcJ5ExT+RABvzAgomd2O 25NTzbKprVyuG6MxIniFRDEZBgKqG/FdMeiH4igWGxmH8+2aTgtV5TnpVDlCHvyOnJ3MTnRcN0k dxg2Q1w0+mbHV5w7aNN5Syliioat4mRHC3xXn+w4fLZ/FnsijZbmdMV8b394y0/f73guIMU2T5U S9BNnLhD5iEl0OvQ6utN1WGfRDlTRCiogVIpTc1sl9jUL7e8vGLtExW7n8fd7dPdvCl8KpWy3Q0 y2xiYD5R3Sgh5oxpRNCboQ7J9MkIcdR9atJsMNKAqsWJFjfu1VV03QaBquxEUpM4/P1QqH3bUSo txjrYyeYUFwAjav5ifA== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAxMDA1MCBTYWx0ZWRfX8fZJ7e4+SKwj M57Unor0m7/MStqOZ1rSb5ZoIRWjVgnkHB2v9ejspo6l3lBEnTiC7n+auYxtSR1eq0tqvj6u2vt 6MVsaDEFLIw9U+Y/RsT2WDfQy8bGkzE= X-Proofpoint-ORIG-GUID: pqDYeZ-orngUbmJSLk7BVKbda5MhI-0S X-Proofpoint-GUID: pqDYeZ-orngUbmJSLk7BVKbda5MhI-0S X-Authority-Analysis: v=2.4 cv=NrJE4MdJ c=1 sm=1 tr=0 ts=6abe5647 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=KhvH2Z7gLfpSUoOGztgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-01_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610010050 On 9/25/2026 3:52 PM, Ajay Kumar Nandam wrote: > > > On 9/22/2026 3:12 PM, Mohammad Rafi Shaik wrote: >> From: Prasad Kumpatla >> >> Hawi integrates the Bolero v4.0 TX macro, which extends the v9.x TX >> macro with a port-select stage in the SWR microphone input path and an >> adaptive filter (ADPT) block. >> >> Add the additional CFG2 mux registers and per-path CFG2 registers to the >> register map, extend the maximum register offset to cover the new ADPT >> control register, and describe the new v4.0 decimator, SWR microphone, >> WSA and port-select mux widgets and their routes. >> >> The ADPT block has to be disabled before a decimator is enabled. This >> register only exists on v4.0, so gate the write on a has_adpt flag set >> from the match data rather than issuing it unconditionally. >> >> Add the "qcom,hawi-lpass-tx-macro" compatible and its match data to >> select the new widgets and routes. >> >> Co-developed-by: Sarath Ganapathiraju >> >> Signed-off-by: Sarath Ganapathiraju >> >> Signed-off-by: Prasad Kumpatla >> Signed-off-by: Mohammad Rafi Shaik >> >> --- >>   sound/soc/codecs/lpass-macro-common.h |   1 + >>   sound/soc/codecs/lpass-tx-macro.c     | 442 >> +++++++++++++++++++++++++++++++++- >>   2 files changed, 442 insertions(+), 1 deletion(-) >> >> diff --git a/sound/soc/codecs/lpass-macro-common.h >> b/sound/soc/codecs/lpass-macro-common.h >> index b52665b11e35..707b22a6bda6 100644 >> --- a/sound/soc/codecs/lpass-macro-common.h >> +++ b/sound/soc/codecs/lpass-macro-common.h >> @@ -16,6 +16,7 @@ enum lpass_version { >>       LPASS_VER_9_2_0, >>       LPASS_VER_10_0_0, >>       LPASS_VER_11_0_0, >> +    LPASS_VER_15_0_0, >>   }; >>     enum lpass_codec_version { >> diff --git a/sound/soc/codecs/lpass-tx-macro.c >> b/sound/soc/codecs/lpass-tx-macro.c >> index 6deaaabe43af..b1eee16e968c 100644 >> --- a/sound/soc/codecs/lpass-tx-macro.c >> +++ b/sound/soc/codecs/lpass-tx-macro.c >> @@ -67,6 +67,14 @@ >>   #define CDC_TX_INP_MUX_ADC_MUX6_CFG1    (0x0134) >>   #define CDC_TX_INP_MUX_ADC_MUX7_CFG0    (0x0138) >>   #define CDC_TX_INP_MUX_ADC_MUX7_CFG1    (0x013C) >> +#define CDC_TX_INP_MUX_ADC_MUX0_CFG2    (0x0140) >> +#define CDC_TX_INP_MUX_ADC_MUX1_CFG2    (0x0144) >> +#define CDC_TX_INP_MUX_ADC_MUX2_CFG2    (0x0148) >> +#define CDC_TX_INP_MUX_ADC_MUX3_CFG2    (0x014C) >> +#define CDC_TX_INP_MUX_ADC_MUX4_CFG2    (0x0150) >> +#define CDC_TX_INP_MUX_ADC_MUX5_CFG2    (0x0154) >> +#define CDC_TX_INP_MUX_ADC_MUX6_CFG2    (0x0158) >> +#define CDC_TX_INP_MUX_ADC_MUX7_CFG2    (0x015C) >>   #define CDC_TX_ANC0_CLK_RESET_CTL    (0x0200) >>   #define CDC_TX_ANC0_MODE_1_CTL        (0x0204) >>   #define CDC_TX_ANC0_MODE_2_CTL        (0x0208) >> @@ -108,6 +116,16 @@ >>   #define CDC_TX0_TX_PATH_SEC5        (0x0424) >>   #define CDC_TX0_TX_PATH_SEC6        (0x0428) >>   #define CDC_TX0_TX_PATH_SEC7        (0x042C) >> +#define CDC_TX0_TX_PATH_CFG2        (0x0430) >> +#define CDC_TX1_TX_PATH_CFG2        (0x04B0) >> +#define CDC_TX2_TX_PATH_CFG2        (0x0530) >> +#define CDC_TX3_TX_PATH_CFG2        (0x05B0) >> +#define CDC_TX4_TX_PATH_CFG2        (0x0630) >> +#define CDC_TX5_TX_PATH_CFG2        (0x06B0) >> +#define CDC_TX6_TX_PATH_CFG2        (0x0730) >> +#define CDC_TX7_TX_PATH_CFG2        (0x07B0) >> +#define CDC_ADPT0_ADPT_CTRL        (0x0800) >> + >>   #define CDC_TX0_MBHC_CTL_EN_MASK    BIT(6) >>   #define CDC_TX1_TX_PATH_CTL        (0x0480) >>   #define CDC_TX1_TX_PATH_CFG0        (0x0484) >> @@ -186,7 +204,7 @@ >>   #define CDC_TX7_TX_PATH_SEC4        (0x07A0) >>   #define CDC_TX7_TX_PATH_SEC5        (0x07A4) >>   #define CDC_TX7_TX_PATH_SEC6        (0x07A8) >> -#define TX_MAX_OFFSET            (0x07A8) >> +#define TX_MAX_OFFSET            (CDC_ADPT0_ADPT_CTRL) > > These registers look v4.0-specific from the commit message, but > TX_MAX_OFFSET, tx_defaults[] and tx_is_rw_register() are updated in > the shared regmap configuration used by all TX macro variants. > > The explicit CDC_ADPT0_ADPT_CTRL write is gated with has_adpt, but > regcache_sync() can still sync the new default registers on older > non-v4.0 hardware because the regmap config/default table is shared. > > Should this use a v4.0-specific regmap_config/default table, similar > to the VA macro, or are the CFG2/ADPT registers guaranteed to be > harmless/present on all TX macro variants? Hi Ajay, Thanks for pointing out this. Yes need to add v4.0 specific regmap for this. I will update in next version. Thanks, Prasad > >>   #define TX_MACRO_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\