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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ashish Mhetre <amhetre@nvidia.com>,
	robh+dt@kernel.org, thierry.reding@gmail.com, digetx@gmail.com,
	jonathanh@nvidia.com, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-tegra@vger.kernel.org
Cc: vdumpa@nvidia.com, Snikam@nvidia.com
Subject: Re: [Patch v5 3/4] dt-bindings: memory: Update reg maxitems for tegra186
Date: Tue, 22 Mar 2022 19:42:24 +0100	[thread overview]
Message-ID: <81745773-bc8b-2669-3fdb-47890613f166@kernel.org> (raw)
In-Reply-To: <66a3f996-ac12-9165-93c9-e1fa93b80eed@nvidia.com>

On 22/03/2022 19:12, Ashish Mhetre wrote:
> 
> 
> On 3/20/2022 6:12 PM, Krzysztof Kozlowski wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> On 16/03/2022 10:25, Ashish Mhetre wrote:
>>>  From tegra186 onwards, memory controller support multiple channels.
>>> Reg items are updated with address and size of these channels.
>>> Tegra186 has overall 5 memory controller channels. Tegra194 and tegra234
>>> have overall 17 memory controller channels each.
>>> There is 1 reg item for memory controller stream-id registers.
>>> So update the reg maxItems to 18 in tegra186 devicetree documentation.
>>>
>>> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
>>> ---
>>>   .../nvidia,tegra186-mc.yaml                   | 20 +++++++++++++------
>>>   1 file changed, 14 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
>>> index 13c4c82fd0d3..3c4e231dc1de 100644
>>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
>>> @@ -34,8 +34,8 @@ properties:
>>>             - nvidia,tegra234-mc
>>>
>>>     reg:
>>> -    minItems: 1
>>> -    maxItems: 3
>>> +    minItems: 6
>>> +    maxItems: 18
>>
>> Still ABI break and now the in-kernel DTS will report dt check errors.
>>
> The dt check error is because I mistakenly updated example in EMC node
> instead of MC. I'll fix it in next version.

The existing DTS will start failing with:
nvidia,tegra186-mc.example.dtb: memory-controller@2c00000: reg: [[0,
46137344, 0, 720896]] is too short


because you require now length of 6 minimum.

> 
>> I think you ignored the comments you got about breaking ABI.
>>
> No, I took care of the ABI break in v5. I have updated details about
> how we took care of it in first patch.

Right, driver part looks ok.


Best regards,
Krzysztof

  reply	other threads:[~2022-03-22 18:42 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-16  9:25 [Patch v5 0/4] memory: tegra: Add MC channels and error logging Ashish Mhetre
2022-03-16  9:25 ` [Patch v5 1/4] memory: tegra: Add memory controller channels support Ashish Mhetre
2022-03-19 15:42   ` Dmitry Osipenko
2022-03-22 16:13     ` Ashish Mhetre
2022-03-25  4:50     ` Ashish Mhetre
2022-03-29 23:48       ` Dmitry Osipenko
2022-03-30  5:07         ` Ashish Mhetre
2022-03-20 12:31   ` Krzysztof Kozlowski
2022-03-22 18:04     ` Ashish Mhetre
2022-03-22 18:24       ` Krzysztof Kozlowski
2022-03-16  9:25 ` [Patch v5 2/4] memory: tegra: Add MC error logging on tegra186 onward Ashish Mhetre
2022-03-19 15:50   ` Dmitry Osipenko
2022-03-19 16:19     ` Dmitry Osipenko
2022-03-22 17:51       ` Ashish Mhetre
2022-03-22 16:48     ` Ashish Mhetre
2022-03-19 15:59   ` Dmitry Osipenko
2022-03-22 17:23     ` Ashish Mhetre
2022-03-29 23:51       ` Dmitry Osipenko
2022-03-30  5:02         ` Ashish Mhetre
2022-03-19 16:14   ` Dmitry Osipenko
2022-03-22 17:34     ` Ashish Mhetre
2022-03-30  0:01       ` Dmitry Osipenko
2022-03-30 10:16         ` Ashish Mhetre
2022-03-30 10:36           ` Dmitry Osipenko
2022-03-30 11:22             ` Ashish Mhetre
2022-03-31 19:49               ` Dmitry Osipenko
2022-03-31 21:55                 ` Ashish Mhetre
2022-03-20 12:53   ` Dmitry Osipenko
2022-03-23  8:36     ` Ashish Mhetre
2022-03-30  0:06   ` Dmitry Osipenko
2022-03-30  9:03     ` Ashish Mhetre
2022-03-30 10:19       ` Dmitry Osipenko
2022-03-30 10:34         ` Ashish Mhetre
2022-03-16  9:25 ` [Patch v5 3/4] dt-bindings: memory: Update reg maxitems for tegra186 Ashish Mhetre
2022-03-19 15:42   ` Dmitry Osipenko
2022-03-20  2:13   ` Rob Herring
2022-03-20 12:42   ` Krzysztof Kozlowski
2022-03-22 18:12     ` Ashish Mhetre
2022-03-22 18:42       ` Krzysztof Kozlowski [this message]
2022-03-16  9:25 ` [Patch v5 4/4] arm64: tegra: Add memory controller channels Ashish Mhetre

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