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[78.11.189.27]) by smtp.googlemail.com with ESMTPSA id rv11-20020a17090710cb00b006d5c0cd5e0dsm8617228ejb.82.2022.03.22.11.42.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 22 Mar 2022 11:42:25 -0700 (PDT) Message-ID: <81745773-bc8b-2669-3fdb-47890613f166@kernel.org> Date: Tue, 22 Mar 2022 19:42:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [Patch v5 3/4] dt-bindings: memory: Update reg maxitems for tegra186 Content-Language: en-US To: Ashish Mhetre , robh+dt@kernel.org, thierry.reding@gmail.com, digetx@gmail.com, jonathanh@nvidia.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Cc: vdumpa@nvidia.com, Snikam@nvidia.com References: <20220316092525.4554-1-amhetre@nvidia.com> <20220316092525.4554-4-amhetre@nvidia.com> <74db8a20-7cce-ff86-7ae4-466416443ba9@canonical.com> <66a3f996-ac12-9165-93c9-e1fa93b80eed@nvidia.com> From: Krzysztof Kozlowski In-Reply-To: <66a3f996-ac12-9165-93c9-e1fa93b80eed@nvidia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22/03/2022 19:12, Ashish Mhetre wrote: > > > On 3/20/2022 6:12 PM, Krzysztof Kozlowski wrote: >> External email: Use caution opening links or attachments >> >> >> On 16/03/2022 10:25, Ashish Mhetre wrote: >>> From tegra186 onwards, memory controller support multiple channels. >>> Reg items are updated with address and size of these channels. >>> Tegra186 has overall 5 memory controller channels. Tegra194 and tegra234 >>> have overall 17 memory controller channels each. >>> There is 1 reg item for memory controller stream-id registers. >>> So update the reg maxItems to 18 in tegra186 devicetree documentation. >>> >>> Signed-off-by: Ashish Mhetre >>> --- >>> .../nvidia,tegra186-mc.yaml | 20 +++++++++++++------ >>> 1 file changed, 14 insertions(+), 6 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> index 13c4c82fd0d3..3c4e231dc1de 100644 >>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml >>> @@ -34,8 +34,8 @@ properties: >>> - nvidia,tegra234-mc >>> >>> reg: >>> - minItems: 1 >>> - maxItems: 3 >>> + minItems: 6 >>> + maxItems: 18 >> >> Still ABI break and now the in-kernel DTS will report dt check errors. >> > The dt check error is because I mistakenly updated example in EMC node > instead of MC. I'll fix it in next version. The existing DTS will start failing with: nvidia,tegra186-mc.example.dtb: memory-controller@2c00000: reg: [[0, 46137344, 0, 720896]] is too short because you require now length of 6 minimum. > >> I think you ignored the comments you got about breaking ABI. >> > No, I took care of the ABI break in v5. I have updated details about > how we took care of it in first patch. Right, driver part looks ok. Best regards, Krzysztof