[PATCH v2 0/2] qdu1000: Fix LLCC reg property

[PATCH v2 0/2] qdu1000: Fix LLCC reg property

[Komal Bajaj]

The LLCC binding and driver was corrected to handle the stride
varying between platforms. Switch to the new format to obtain
the base address of each LLCC bank from devicetree.

-----
Changes in v2:
* Updated the commit message for bindings, marking the change as revert
* Link to v1: https://lore.kernel.org/linux-arm-msm/20240612062719.31724-1-quic_kbajaj@quicinc.com/

Komal Bajaj (2):
  arm64: dts: qcom: qdu1000: Fix LLCC reg property
  Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"

 .../devicetree/bindings/cache/qcom,llcc.yaml     |  2 +-
 arch/arm64/boot/dts/qcom/qdu1000.dtsi            | 16 +++++++++++++++-
 2 files changed, 16 insertions(+), 2 deletions(-)

--
2.42.0

[PATCH v2 1/2] arm64: dts: qcom: qdu1000: Fix LLCC reg property

[Komal Bajaj]

The LLCC binding and driver was corrected to handle the stride
varying between platforms. Switch to the new format to ensure
accesses are done in the right place.

Fixes: b0e0290bc47d ("arm64: dts: qcom: qdu1000: correct LLCC reg entries")
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qdu1000.dtsi | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 7a77f7a55498..3795ebb2d3d6 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1579,9 +1579,23 @@ gem_noc: interconnect@19100000 {

 		system-cache-controller@19200000 {
 			compatible = "qcom,qdu1000-llcc";
-			reg = <0 0x19200000 0 0xd80000>,
+			reg = <0 0x19200000 0 0x80000>,
+			      <0 0x19300000 0 0x80000>,
+			      <0 0x19600000 0 0x80000>,
+			      <0 0x19700000 0 0x80000>,
+			      <0 0x19a00000 0 0x80000>,
+			      <0 0x19b00000 0 0x80000>,
+			      <0 0x19e00000 0 0x80000>,
+			      <0 0x19f00000 0 0x80000>,
 			      <0 0x1a200000 0 0x80000>;
 			reg-names = "llcc0_base",
+				    "llcc1_base",
+				    "llcc2_base",
+				    "llcc3_base",
+				    "llcc4_base",
+				    "llcc5_base",
+				    "llcc6_base",
+				    "llcc7_base",
 				    "llcc_broadcast_base";
 			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
 		};
--
2.42.0

[PATCH v2 2/2] Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"

[Komal Bajaj]

This reverts commit f0f99f371822c48847e02e56d6e7de507e18f186.

QDU1000 has 7 register regions. The earlier commit 8e2506d01231
("dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000")
to add llcc compatible was reflecting the same, but dtsi change for
QDU1000 was not aligning with its binding. Later, commit f0f99f371822
("dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries") was merged
intended to fix this misalignment.

After the LLCC driver refactor, each LLCC bank/channel need to be
represented as one register space to avoid mapping to the region where
access is not there. Hence, revert the commit f0f99f371822 ("dt-bindings:
cache: qcom,llcc: correct QDU1000 reg entries") to align QDU1000 llcc
binding with its dtsi node.

Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 192911696010..68ea5f70b75f 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -67,7 +67,6 @@ allOf:
         compatible:
           contains:
             enum:
-              - qcom,qdu1000-llcc
               - qcom,sc7180-llcc
               - qcom,sm6350-llcc
     then:
@@ -132,6 +131,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qdu1000-llcc
               - qcom,sc8180x-llcc
               - qcom,sc8280xp-llcc
               - qcom,x1e80100-llcc
--
2.42.0

Re: [PATCH v2 2/2] Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"

[Konrad Dybcio]

On 6/19/24 08:16, Komal Bajaj wrote:
> This reverts commit f0f99f371822c48847e02e56d6e7de507e18f186.
> 
> QDU1000 has 7 register regions. The earlier commit 8e2506d01231
> ("dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000")
> to add llcc compatible was reflecting the same, but dtsi change for
> QDU1000 was not aligning with its binding. Later, commit f0f99f371822
> ("dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries") was merged
> intended to fix this misalignment.
> 
> After the LLCC driver refactor, each LLCC bank/channel need to be
> represented as one register space to avoid mapping to the region where
> access is not there. Hence, revert the commit f0f99f371822 ("dt-bindings:
> cache: qcom,llcc: correct QDU1000 reg entries") to align QDU1000 llcc
> binding with its dtsi node.
> 
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---

For future reference, it would be good to have this as patch 1,
to prevent the previous one introducing (fake) schema warnings

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

Re: [PATCH v2 1/2] arm64: dts: qcom: qdu1000: Fix LLCC reg property

[Konrad Dybcio]

On 6/19/24 08:16, Komal Bajaj wrote:
> The LLCC binding and driver was corrected to handle the stride
> varying between platforms. Switch to the new format to ensure
> accesses are done in the right place.
> 
> Fixes: b0e0290bc47d ("arm64: dts: qcom: qdu1000: correct LLCC reg entries")
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> Reviewed-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad

Re: [PATCH v2 2/2] Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 2058 bytes --]

On Wed, Jun 19, 2024 at 11:46:41AM +0530, Komal Bajaj wrote:
> This reverts commit f0f99f371822c48847e02e56d6e7de507e18f186.
> 
> QDU1000 has 7 register regions. The earlier commit 8e2506d01231
> ("dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000")
> to add llcc compatible was reflecting the same, but dtsi change for
> QDU1000 was not aligning with its binding. Later, commit f0f99f371822
> ("dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries") was merged
> intended to fix this misalignment.
> 
> After the LLCC driver refactor, each LLCC bank/channel need to be
> represented as one register space to avoid mapping to the region where
> access is not there. Hence, revert the commit f0f99f371822 ("dt-bindings:
> cache: qcom,llcc: correct QDU1000 reg entries") to align QDU1000 llcc
> binding with its dtsi node.
> 
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
>  Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 +-

I assume that Bjorn will apply this, I think I'm probably "meant" to
apply patches for the cache bindings dir, but never added it to
maintainers. I think Bjorn's been taking these via soc or w/e til now?

>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> index 192911696010..68ea5f70b75f 100644
> --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
> @@ -67,7 +67,6 @@ allOf:
>          compatible:
>            contains:
>              enum:
> -              - qcom,qdu1000-llcc
>                - qcom,sc7180-llcc
>                - qcom,sm6350-llcc
>      then:
> @@ -132,6 +131,7 @@ allOf:
>          compatible:
>            contains:
>              enum:
> +              - qcom,qdu1000-llcc
>                - qcom,sc8180x-llcc
>                - qcom,sc8280xp-llcc
>                - qcom,x1e80100-llcc
> --
> 2.42.0
> 

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Re: [PATCH v2 0/2] qdu1000: Fix LLCC reg property

[Bjorn Andersson]

On Wed, 19 Jun 2024 11:46:39 +0530, Komal Bajaj wrote:
> The LLCC binding and driver was corrected to handle the stride
> varying between platforms. Switch to the new format to obtain
> the base address of each LLCC bank from devicetree.
> 
> -----
> Changes in v2:
> * Updated the commit message for bindings, marking the change as revert
> * Link to v1: https://lore.kernel.org/linux-arm-msm/20240612062719.31724-1-quic_kbajaj@quicinc.com/
> 
> [...]

Applied, thanks!

[1/2] arm64: dts: qcom: qdu1000: Fix LLCC reg property
      commit: af355e799b3dc3dd0ed8bf2143641af05d8cd3d4
[2/2] Revert "dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries"
      commit: e32ac54b0529a8727235c04aebe1f2d689fa5cfe

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>