[PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Ivaylo Ivanov]

Hey folks,

This patchset adds device tree nodes for multiple clock management unit
blocks, MCT, SPI and UART for Exynos8895.

Exynos8895 uses USIv1 for most of its serial buses, except a few that
have been implemented in this series. Support for USIv1 and HSI2C will
be added in the future.

This patchset is dependent on [1] and [2], which add driver support for
CMU and UART.

[1] https://lore.kernel.org/all/20241023090136.537395-1-ivo.ivanov.ivanov1@gmail.com/
[2] https://lore.kernel.org/all/20241023090902.538040-1-ivo.ivanov.ivanov1@gmail.com/

Changes in v2:
 - Add r-b from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 - Change clock-names according to the v2 changes for clk bindings

Ivaylo Ivanov (5):
  dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct
    compatible
  arm64: dts: exynos8895: Add clock management unit nodes
  arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
  arm64: dts: exynos8895: Add serial_0/1 nodes
  arm64: dts: exynos8895: Add spi_0/1 nodes

 .../timer/samsung,exynos4210-mct.yaml         |   2 +
 arch/arm64/boot/dts/exynos/exynos8895.dtsi    | 161 ++++++++++++++++++
 2 files changed, 163 insertions(+)

-- 
2.43.0

[PATCH v2 1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible

[Ivaylo Ivanov]

Just like most Samsung Exynos SoCs, Exynos8895 uses almost the same
Multi-Core Timer block with no functional differences.

Add dedicated samsung,exynos8895-mct compatible to the dt-schema for
representing the MCT timer of Exynos8895 SoC.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/timer/samsung,exynos4210-mct.yaml       | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
index 774b7992a..02d1c3558 100644
--- a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
+++ b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml
@@ -33,6 +33,7 @@ properties:
               - samsung,exynos5420-mct
               - samsung,exynos5433-mct
               - samsung,exynos850-mct
+              - samsung,exynos8895-mct
               - tesla,fsd-mct
           - const: samsung,exynos4210-mct
 
@@ -133,6 +134,7 @@ allOf:
               - samsung,exynos5420-mct
               - samsung,exynos5433-mct
               - samsung,exynos850-mct
+              - samsung,exynos8895-mct
     then:
       properties:
         interrupts:
-- 
2.43.0

[PATCH v2 2/5] arm64: dts: exynos8895: Add clock management unit nodes

[Ivaylo Ivanov]

Add clock management unit nodes for:
- cmu_top, which provides muxes, divs and gates for other CMUs
- cmu_peris, which provides clocks for GIC and MCT
- cmu_fsys0, which provides clocks for USBDRD30
- cmu_fsys1, which provides clocks for MMC, UFS and PCIE
- cmu_peric0, which provides clocks for UART_DBG, USI00 ~ USI03
- cmu_peric1, which provides clocks for SPI_CAM0/1, UART_BT,
USI04 ~ USI13

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 arch/arm64/boot/dts/exynos/exynos8895.dtsi | 85 ++++++++++++++++++++++
 1 file changed, 85 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index 223ebd482..54037b0dc 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -5,6 +5,7 @@
  * Copyright (c) 2024, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
  */
 
+#include <dt-bindings/clock/samsung,exynos8895.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
@@ -159,6 +160,15 @@ chipid@10000000 {
 			reg = <0x10000000 0x24>;
 		};
 
+		cmu_peris: clock-controller@10010000 {
+			compatible = "samsung,exynos8895-cmu-peris";
+			reg = <0x10010000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_PERIS_BUS>;
+			clock-names = "oscclk", "bus";
+		};
+
 		gic: interrupt-controller@10201000 {
 			compatible = "arm,gic-400";
 			reg = <0x10201000 0x1000>,
@@ -173,24 +183,91 @@ gic: interrupt-controller@10201000 {
 			#size-cells = <1>;
 		};
 
+		cmu_peric0: clock-controller@10400000 {
+			compatible = "samsung,exynos8895-cmu-peric0";
+			reg = <0x10400000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_UART_DBG>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_USI00>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_USI01>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_USI02>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC0_USI03>;
+			clock-names = "oscclk", "bus", "uart", "usi0",
+				      "usi1", "usi2", "usi3";
+		};
+
 		pinctrl_peric0: pinctrl@104d0000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x104d0000 0x1000>;
 			interrupts = <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		cmu_peric1: clock-controller@10800000 {
+			compatible = "samsung,exynos8895-cmu-peric1";
+			reg = <0x10800000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_SPEEDY2>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM0>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_SPI_CAM1>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_UART_BT>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI04>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI05>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI06>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI07>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI08>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI09>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI10>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI11>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI12>,
+				 <&cmu_top CLK_DOUT_CMU_PERIC1_USI13>;
+			clock-names = "oscclk", "bus", "speedy", "cam0",
+				      "cam1", "uart", "usi4", "usi5",
+				      "usi6", "usi7", "usi8", "usi9",
+				      "usi10", "usi11", "usi12", "usi13";
+		};
+
 		pinctrl_peric1: pinctrl@10980000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x10980000 0x1000>;
 			interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		cmu_fsys0: clock-controller@11000000 {
+			compatible = "samsung,exynos8895-cmu-fsys0";
+			reg = <0x11000000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS0_BUS>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS0_DPGTC>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS0_MMC_EMBD>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS0_UFS_EMBD>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS0_USBDRD30>;
+			clock-names = "oscclk", "bus", "dpgtc", "mmc",
+				      "ufs", "usbdrd30";
+		};
+
 		pinctrl_fsys0: pinctrl@11050000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x11050000 0x1000>;
 			interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		cmu_fsys1: clock-controller@11400000 {
+			compatible = "samsung,exynos8895-cmu-fsys1";
+			reg = <0x11400000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS1_BUS>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS1_PCIE>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS1_UFS_CARD>,
+				 <&cmu_top CLK_DOUT_CMU_FSYS1_MMC_CARD>;
+			clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
+		};
+
 		pinctrl_fsys1: pinctrl@11430000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x11430000 0x1000>;
@@ -213,6 +290,14 @@ pinctrl_busc: pinctrl@15a30000 {
 			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		cmu_top: clock-controller@15a80000 {
+			compatible = "samsung,exynos8895-cmu-top";
+			reg = <0x15a80000 0x8000>;
+			#clock-cells = <1>;
+			clocks = <&oscclk>;
+			clock-names = "oscclk";
+		};
+
 		pmu_system_controller: system-controller@16480000 {
 			compatible = "samsung,exynos8895-pmu",
 				     "samsung,exynos7-pmu", "syscon";
-- 
2.43.0

[PATCH v2 3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node

[Ivaylo Ivanov]

MCT has one global timer and 8 CPU local timers. The global timer
can generate 4 interrupts, and each local timer can generate an
interrupt making 12 interrupts in total.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 arch/arm64/boot/dts/exynos/exynos8895.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index 54037b0dc..e6c8a4966 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -169,6 +169,26 @@ cmu_peris: clock-controller@10010000 {
 			clock-names = "oscclk", "bus";
 		};
 
+		timer@10040000 {
+			compatible = "samsung,exynos8895-mct",
+				     "samsung,exynos4210-mct";
+			reg = <0x10040000 0x800>;
+			clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>;
+			clock-names = "fin_pll", "mct";
+			interrupts = <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		gic: interrupt-controller@10201000 {
 			compatible = "arm,gic-400";
 			reg = <0x10201000 0x1000>,
-- 
2.43.0

[PATCH v2 4/5] arm64: dts: exynos8895: Add serial_0/1 nodes

[Ivaylo Ivanov]

Add nodes for serial_0 (UART_DBG) and serial_1 (UART_BT), which
allows using them.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 arch/arm64/boot/dts/exynos/exynos8895.dtsi | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index e6c8a4966..ad50cd4f6 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -218,6 +218,19 @@ cmu_peric0: clock-controller@10400000 {
 				      "usi1", "usi2", "usi3";
 		};
 
+		serial_0: serial@10430000 {
+			compatible = "samsung,exynos8895-uart";
+			reg = <0x10430000 0x100>;
+			clocks = <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_PCLK>,
+				 <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK>;
+			clock-names = "uart", "clk_uart_baud0";
+			interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart0_bus>;
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
 		pinctrl_peric0: pinctrl@104d0000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x104d0000 0x1000>;
@@ -250,6 +263,19 @@ cmu_peric1: clock-controller@10800000 {
 				      "usi10", "usi11", "usi12", "usi13";
 		};
 
+		serial_1: serial@10830000 {
+			compatible = "samsung,exynos8895-uart";
+			reg = <0x10830000 0x100>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_PCLK>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_EXT_UCLK>;
+			clock-names = "uart", "clk_uart_baud0";
+			interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&uart1_bus>;
+			samsung,uart-fifosize = <256>;
+			status = "disabled";
+		};
+
 		pinctrl_peric1: pinctrl@10980000 {
 			compatible = "samsung,exynos8895-pinctrl";
 			reg = <0x10980000 0x1000>;
-- 
2.43.0

Re: (subset) [PATCH v2 4/5] arm64: dts: exynos8895: Add serial_0/1 nodes

[Krzysztof Kozlowski]

On Wed, 23 Oct 2024 12:17:33 +0300, Ivaylo Ivanov wrote:
> Add nodes for serial_0 (UART_DBG) and serial_1 (UART_BT), which
> allows using them.
> 
> 

Applied, thanks!

[4/5] arm64: dts: exynos8895: Add serial_0/1 nodes
      https://git.kernel.org/krzk/linux/c/aa33006c53c9c56ecbcbbb9b5415e27000eb86d4

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

[PATCH v2 5/5] arm64: dts: exynos8895: Add spi_0/1 nodes

[Ivaylo Ivanov]

Add nodes for spi_0 (SPI_CAM0) and spi_1 (SPI_CAM1), which
allows using them.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
 arch/arm64/boot/dts/exynos/exynos8895.dtsi | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index ad50cd4f6..ee393f4f0 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -282,6 +282,36 @@ pinctrl_peric1: pinctrl@10980000 {
 			interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		spi_0: spi@109d0000 {
+			compatible = "samsung,exynos8895-spi",
+				     "samsung,exynos850-spi";
+			reg = <0x109d0000 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>;
+			clock-names = "spi", "spi_busclk0";
+			interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&spi0_bus>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
+		spi_1: spi@109e0000 {
+			compatible = "samsung,exynos8895-spi",
+				     "samsung,exynos850-spi";
+			reg = <0x109e0000 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>,
+				 <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>;
+			clock-names = "spi", "spi_busclk0";
+			interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-0 = <&spi1_bus>;
+			pinctrl-names = "default";
+			status = "disabled";
+		};
+
 		cmu_fsys0: clock-controller@11000000 {
 			compatible = "samsung,exynos8895-cmu-fsys0";
 			reg = <0x11000000 0x8000>;
-- 
2.43.0

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Ivaylo Ivanov]

On 10/23/24 12:17, Ivaylo Ivanov wrote:
> Hey folks,
>
> This patchset adds device tree nodes for multiple clock management unit
> blocks, MCT, SPI and UART for Exynos8895.
>
> Exynos8895 uses USIv1 for most of its serial buses, except a few that
> have been implemented in this series. Support for USIv1 and HSI2C will
> be added in the future.
>
> This patchset is dependent on [1] and [2], which add driver support for
> CMU and UART.
>
> [1] https://lore.kernel.org/all/20241023090136.537395-1-ivo.ivanov.ivanov1@gmail.com/
> [2] https://lore.kernel.org/all/20241023090902.538040-1-ivo.ivanov.ivanov1@gmail.com/
>
> Changes in v2:
>  - Add r-b from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>  - Change clock-names according to the v2 changes for clk bindings

Forgot to mention that I dropped the SPI patch due to it getting applied.

Best regards, Ivo.

>
> Ivaylo Ivanov (5):
>   dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct
>     compatible
>   arm64: dts: exynos8895: Add clock management unit nodes
>   arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
>   arm64: dts: exynos8895: Add serial_0/1 nodes
>   arm64: dts: exynos8895: Add spi_0/1 nodes
>
>  .../timer/samsung,exynos4210-mct.yaml         |   2 +
>  arch/arm64/boot/dts/exynos/exynos8895.dtsi    | 161 ++++++++++++++++++
>  2 files changed, 163 insertions(+)
>

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Krzysztof Kozlowski]

On 23/10/2024 11:17, Ivaylo Ivanov wrote:
> Hey folks,
> 
> This patchset adds device tree nodes for multiple clock management unit
> blocks, MCT, SPI and UART for Exynos8895.
> 
> Exynos8895 uses USIv1 for most of its serial buses, except a few that
> have been implemented in this series. Support for USIv1 and HSI2C will
> be added in the future.
> 
> This patchset is dependent on [1] and [2], which add driver support for
> CMU and UART.
> 
> [1] https://lore.kernel.org/all/20241023090136.537395-1-ivo.ivanov.ivanov1@gmail.com/

I cannot merge driver changes into DTS. Are you sure you have driver
dependency?

> [2] https://lore.kernel.org/all/20241023090902.538040-1-ivo.ivanov.ivanov1@gmail.com/

I cannot merge this either. This is serial tree.

Maybe you these are not really dependencies? What is here depending on
what, specifically? What prevents me from applying it?

Best regards,
Krzysztof

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Ivaylo Ivanov]

On 10/26/24 14:53, Krzysztof Kozlowski wrote:
> On 23/10/2024 11:17, Ivaylo Ivanov wrote:
>> Hey folks,
>>
>> This patchset adds device tree nodes for multiple clock management unit
>> blocks, MCT, SPI and UART for Exynos8895.
>>
>> Exynos8895 uses USIv1 for most of its serial buses, except a few that
>> have been implemented in this series. Support for USIv1 and HSI2C will
>> be added in the future.
>>
>> This patchset is dependent on [1] and [2], which add driver support for
>> CMU and UART.
>>
>> [1] https://lore.kernel.org/all/20241023090136.537395-1-ivo.ivanov.ivanov1@gmail.com/
> I cannot merge driver changes into DTS. Are you sure you have driver
> dependency?
>
>> [2] https://lore.kernel.org/all/20241023090902.538040-1-ivo.ivanov.ivanov1@gmail.com/
> I cannot merge this either. This is serial tree.
>
> Maybe you these are not really dependencies? What is here depending on
> what, specifically? What prevents me from applying it?

The specified patchsets add driver functionality, as well as bindings,
for serial and clocks. This patchset makes 8895's device tree a user
of them. I guess it's not really a dependency, as 8895 devices should
still function without the driver compatibles merged, but there's gonna
be missing bindings.

Best regards, Ivo.

> Best regards,
> Krzysztof
>

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Krzysztof Kozlowski]

On 26/10/2024 13:59, Ivaylo Ivanov wrote:
> 
> 
> 
> On 10/26/24 14:53, Krzysztof Kozlowski wrote:
>> On 23/10/2024 11:17, Ivaylo Ivanov wrote:
>>> Hey folks,
>>>
>>> This patchset adds device tree nodes for multiple clock management unit
>>> blocks, MCT, SPI and UART for Exynos8895.
>>>
>>> Exynos8895 uses USIv1 for most of its serial buses, except a few that
>>> have been implemented in this series. Support for USIv1 and HSI2C will
>>> be added in the future.
>>>
>>> This patchset is dependent on [1] and [2], which add driver support for
>>> CMU and UART.
>>>
>>> [1] https://lore.kernel.org/all/20241023090136.537395-1-ivo.ivanov.ivanov1@gmail.com/
>> I cannot merge driver changes into DTS. Are you sure you have driver
>> dependency?
>>
>>> [2] https://lore.kernel.org/all/20241023090902.538040-1-ivo.ivanov.ivanov1@gmail.com/
>> I cannot merge this either. This is serial tree.
>>
>> Maybe you these are not really dependencies? What is here depending on
>> what, specifically? What prevents me from applying it?
> 
> The specified patchsets add driver functionality, as well as bindings,
> for serial and clocks. This patchset makes 8895's device tree a user
> of them. I guess it's not really a dependency, as 8895 devices should
> still function without the driver compatibles merged, but there's gonna
> be missing bindings.

So the only dependency is on clock bindings? If so, that's the only
message expected here. There are no other dependencies.

Best regards,
Krzysztof

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Krzysztof Kozlowski]

On Wed, 23 Oct 2024 12:17:29 +0300, Ivaylo Ivanov wrote:
> Hey folks,
> 
> This patchset adds device tree nodes for multiple clock management unit
> blocks, MCT, SPI and UART for Exynos8895.
> 
> Exynos8895 uses USIv1 for most of its serial buses, except a few that
> have been implemented in this series. Support for USIv1 and HSI2C will
> be added in the future.
> 
> [...]

NOT applied patch 4/5 - I wait for bindings to be accepted by Greg.

Applied, thanks!

[1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible
      https://git.kernel.org/krzk/linux/c/e54eb0465e548a7c6115e336ec5cfec04bbe8747
[2/5] arm64: dts: exynos8895: Add clock management unit nodes
      https://git.kernel.org/krzk/linux/c/fa986d1073805154888a788eda38d46a796346e8
[3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
      https://git.kernel.org/krzk/linux/c/9ad6c3bd1bcbb73e2a5723e13b9d06e2296b07e4
[5/5] arm64: dts: exynos8895: Add spi_0/1 nodes
      https://git.kernel.org/krzk/linux/c/a5541d737c8de71948bcdaee912bcb6b0781af7e

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Ivaylo Ivanov]

On 10/26/24 15:12, Krzysztof Kozlowski wrote:
> On Wed, 23 Oct 2024 12:17:29 +0300, Ivaylo Ivanov wrote:
>> Hey folks,
>>
>> This patchset adds device tree nodes for multiple clock management unit
>> blocks, MCT, SPI and UART for Exynos8895.
>>
>> Exynos8895 uses USIv1 for most of its serial buses, except a few that
>> have been implemented in this series. Support for USIv1 and HSI2C will
>> be added in the future.
>>
>> [...]
> NOT applied patch 4/5 - I wait for bindings to be accepted by Greg.

Alright, thanks for applying the rest!

Best regards, Ivo.

>
> Applied, thanks!
>
> [1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible
>       https://git.kernel.org/krzk/linux/c/e54eb0465e548a7c6115e336ec5cfec04bbe8747
> [2/5] arm64: dts: exynos8895: Add clock management unit nodes
>       https://git.kernel.org/krzk/linux/c/fa986d1073805154888a788eda38d46a796346e8
> [3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
>       https://git.kernel.org/krzk/linux/c/9ad6c3bd1bcbb73e2a5723e13b9d06e2296b07e4
> [5/5] arm64: dts: exynos8895: Add spi_0/1 nodes
>       https://git.kernel.org/krzk/linux/c/a5541d737c8de71948bcdaee912bcb6b0781af7e
>
> Best regards,

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Ivaylo Ivanov]

On 10/26/24 15:18, Ivaylo Ivanov wrote:
>
>
> On 10/26/24 15:12, Krzysztof Kozlowski wrote:
>> On Wed, 23 Oct 2024 12:17:29 +0300, Ivaylo Ivanov wrote:
>>> Hey folks,
>>>
>>> This patchset adds device tree nodes for multiple clock management unit
>>> blocks, MCT, SPI and UART for Exynos8895.
>>>
>>> Exynos8895 uses USIv1 for most of its serial buses, except a few that
>>> have been implemented in this series. Support for USIv1 and HSI2C will
>>> be added in the future.
>>>
>>> [...]
>> NOT applied patch 4/5 - I wait for bindings to be accepted by Greg.
> Alright, thanks for applying the rest!
>
> Best regards, Ivo.

Bump - now that the uart patches are merged, are you gonna merge the DT
changes after the merge window? If not, I can send a new patchset that
includes them and also adds PMU compatible node for the mongoose cores,
since that got merged with exynos9810.

Best regards, Ivo.

>
>> Applied, thanks!
>>
>> [1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible
>>       https://git.kernel.org/krzk/linux/c/e54eb0465e548a7c6115e336ec5cfec04bbe8747
>> [2/5] arm64: dts: exynos8895: Add clock management unit nodes
>>       https://git.kernel.org/krzk/linux/c/fa986d1073805154888a788eda38d46a796346e8
>> [3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node
>>       https://git.kernel.org/krzk/linux/c/9ad6c3bd1bcbb73e2a5723e13b9d06e2296b07e4
>> [5/5] arm64: dts: exynos8895: Add spi_0/1 nodes
>>       https://git.kernel.org/krzk/linux/c/a5541d737c8de71948bcdaee912bcb6b0781af7e
>>
>> Best regards,

Re: [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1

[Krzysztof Kozlowski]

On 07/11/2024 17:02, Ivaylo Ivanov wrote:
> 
> 
> 
> On 10/26/24 15:18, Ivaylo Ivanov wrote:
>>
>>
>> On 10/26/24 15:12, Krzysztof Kozlowski wrote:
>>> On Wed, 23 Oct 2024 12:17:29 +0300, Ivaylo Ivanov wrote:
>>>> Hey folks,
>>>>
>>>> This patchset adds device tree nodes for multiple clock management unit
>>>> blocks, MCT, SPI and UART for Exynos8895.
>>>>
>>>> Exynos8895 uses USIv1 for most of its serial buses, except a few that
>>>> have been implemented in this series. Support for USIv1 and HSI2C will
>>>> be added in the future.
>>>>
>>>> [...]
>>> NOT applied patch 4/5 - I wait for bindings to be accepted by Greg.
>> Alright, thanks for applying the rest!
>>
>> Best regards, Ivo.
> 
> Bump - now that the uart patches are merged, are you gonna merge the DT
> changes after the merge window? If not, I can send a new patchset that
> includes them and also adds PMU compatible node for the mongoose cores,
> since that got merged with exynos9810.
> 
> Best regards, Ivo.

It is too late in the cycle for me to pick it up. I will take it after
the merge window, so feel free to send new version with some other changes.


Best regards,
Krzysztof