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[82.149.1.233]) by smtp.gmail.com with ESMTPSA id a12-20020a1709063a4c00b0098e2eaec395sm3836658ejf.130.2023.08.06.04.56.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Aug 2023 04:56:01 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Andre Przywara Cc: Icenowy Zheng , Piotr Oniszczuk , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/3] sunxi: Orange Pi Zero 3 DT support Date: Sun, 06 Aug 2023 13:56:00 +0200 Message-ID: <8252315.T7Z3S40VBb@jernej-laptop> In-Reply-To: <20230804170856.1237202-1-andre.przywara@arm.com> References: <20230804170856.1237202-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Dne petek, 04. avgust 2023 ob 19:08:53 CEST je Andre Przywara napisal(a): > Hi, > > quick update of the series, mostly cosmetic fixes, except for the > regulator range. For a changelog, see below. > > ================== > Orange Pi recently released the Orange Pi Zero 3 board, which is some > updated version of their former Zero 2 development board. Some component > changes (Motorcomm PHY instead of Realtek, different PMIC), some board > layout changes, and it ships with up to 4GB of DRAM now. The SoC is now > labelled H618 instead of H616, which apparently is the same, just with > more L2 cache. > > Split the existing OPi Zero2 DT, to allow sharing most DT nodes, then > add the binding documentation and DT for the new board. > > Linux v6.5-rc boots out of the box (the PMIC driver just made it in), > and most things work: UART, PSCI, GPIO, SPI flash, SD card, USB. > Ethernet is somewhat working: I get an IP address via DHCP, and can > for instance start SSH, but it hangs at some point. I suspect some > PHY setup problem, though others have it working. Help or advice welcome. Applied, thanks! Best regards, Jernej > > Cheers, > Andre > > Changelog v1 .. v2: > - rename common .dtsi file to sun50i-h616-orangepi-zero.dtsi > - add required Motorcomm PHY DT property to enable clock > - fix regulator ranges: VDD_CPU and VDD_GPU were swapped > - add comment about broken SD card detect > - reorder PMIC properties to match recommended order > > Andre Przywara (3): > arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT > dt-bindings: arm: sunxi: document Orange Pi Zero 3 board name > arm64: dts: allwinner: h616: Add OrangePi Zero 3 board support > > .../devicetree/bindings/arm/sunxi.yaml | 5 + > arch/arm64/boot/dts/allwinner/Makefile | 1 + > .../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++ > .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- > .../allwinner/sun50i-h618-orangepi-zero3.dts | 94 ++++++++++++ > 5 files changed, 235 insertions(+), 118 deletions(-) > create mode 100644 > arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi create mode > 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts