From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B47DC4332F for ; Wed, 8 Dec 2021 16:16:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232824AbhLHQT4 (ORCPT ); Wed, 8 Dec 2021 11:19:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236667AbhLHQTz (ORCPT ); Wed, 8 Dec 2021 11:19:55 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BC6CC061746 for ; Wed, 8 Dec 2021 08:16:23 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id c4so4937526wrd.9 for ; Wed, 08 Dec 2021 08:16:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=s3S6Qu67tEui0DUsR7g/4/F35A73+SPBA+zRxkUhaG8=; b=MOtB1a6nj3/eQ3UtTDyQj1j+VVPdxYy6CedR8STiP6JvFUMlapTFPLi4UqGLNvsarp LBJcZFgfWEfjBSAAsypXx6MZtRZIkpUiNnsuhfbv/v8ov6rSYP/ZvOMQGqIat3nqxTUE sZT4IGJtCEQtYlnhi+uHHCl8gv/wD/2me2DEVJy3eYtdc4A+xHBTdxA1EjO3til/UDMm H/1edaw3ZvxzNZs7S/nWmnPAoIfTzxFkuQvzRY5Zg2TIP1/22hviuBUTchcYCqzkEiCs YLG2lwVRBbHfl0Z0TO8HEmsEIUF8y/l4xfS0BqKLlBXZ8DuHBBHsxnhYUoXSD5M9ohK7 erVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=s3S6Qu67tEui0DUsR7g/4/F35A73+SPBA+zRxkUhaG8=; b=iD5tT9ySMOyX711Sd1lGD7V4ShNmcKPsKISYsUK9HRBEG6mLIWk0w+NDbDJcd1Noxm 040PmvQrwxV4m8/hpLZ8z8pasvChhg9sIqLglynstUcqngd8kE0geMHh0GbUnvOpigdE OBAYEp+VXQnFrXIPzcekIALRz6mxpDqySJR1W5C1bS9ZlJMQhUlgCc/Pkx3Rx2rlAM5X NvMqE2pJzxcvQcIdr7+gypafbZt6hpfYHBqCLhCLd7lhTgIwoM/sDCD9uQPBpKLCx5Nu Vse5LfG1FUgcR8yCkUrMKcPp70MtD/OGCXtMLnZ9Wm+VrKHjZPalTdJnVZEvVHFVyFfD diVA== X-Gm-Message-State: AOAM532dQb9Lp4Pe1cthwxBAsZtyCpiplUNXXeuqmn7MJjbcDPkyQnQV N73TjRV/iifXwTeU2a9aaCDBXA== X-Google-Smtp-Source: ABdhPJyCcP3HTyvqGn8Z6fbCxuZdPjgKKEAI4N4Ibrf6Rk4KMeup+vzySvXG4xrGLqlNMeEqm37nlA== X-Received: by 2002:a5d:48cf:: with SMTP id p15mr60128362wrs.277.1638980181213; Wed, 08 Dec 2021 08:16:21 -0800 (PST) Received: from ?IPv6:2a01:e34:ed2f:f020:8ae8:ca1f:ff1a:a23d? ([2a01:e34:ed2f:f020:8ae8:ca1f:ff1a:a23d]) by smtp.googlemail.com with ESMTPSA id r83sm6322557wma.22.2021.12.08.08.16.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Dec 2021 08:16:20 -0800 (PST) Subject: Re: [PATCH v2 2/5] arm64: dts: rockchip: Add powerzones definition for rock960 To: Rob Herring Cc: arnd@linaro.org, heiko@sntech.de, ulf.hansson@linaro.org, rjw@rjwysocki.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, lukasz.luba@arm.com, Robin Murphy , Johan Jonker , Helen Koike , Brian Norris , Shunqian Zheng , Elaine Zhang , "moderated list:ARM/Rockchip SoC support" , "open list:ARM/Rockchip SoC support" References: <20211126181500.3404129-1-daniel.lezcano@linaro.org> <20211126181500.3404129-2-daniel.lezcano@linaro.org> From: Daniel Lezcano Message-ID: <82ac88d2-5419-4c1f-e81a-154c65b39c1b@linaro.org> Date: Wed, 8 Dec 2021 17:16:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Rob, On 07/12/2021 19:41, Rob Herring wrote: [ ... ] >> thermal_zones: thermal-zones { >> cpu_thermal: cpu-thermal { >> polling-delay-passive = <100>; >> @@ -2027,6 +2050,8 @@ gpu: gpu@ff9a0000 { >> clocks = <&cru ACLK_GPU>; >> #cooling-cells = <2>; >> power-domains = <&power RK3399_PD_GPU>; >> + #powerzone-cells = <0>; >> + powerzone = <&PKG_PZ>; > > Every CPU and the GPU are in the same powerzone. What is the point? Do > you really have to be told that CPUs and GPU are a source of heat and > might need to be limited? A powerzone ==> can read power && set power limit Every CPU is a powerzone as well as the GPU. They are all grouped under PKG_PZ. That means we have: pkg |-- cpu0-3 | |-- cpu4-7 | `-- gpu We can read the power consumption of cpu0-3, cpu4-7 or gpu and set their power limit. We can read the power consumption of pkg (which is the sum of the power consumption of cpu0-3, cpu4-7 and gpu) and I can set the power limit which will ensure powerof(cpu0-3 + cpu4-7 + gpu) <= powerof(pkg). -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog