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Wed, 29 Nov 2023 13:14:51 -0800 (PST) Received: from [192.168.100.102] ([37.228.218.3]) by smtp.gmail.com with ESMTPSA id t13-20020a05600c198d00b003feea62440bsm3374880wmq.43.2023.11.29.13.14.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Nov 2023 13:14:51 -0800 (PST) Message-ID: <8318363a-7122-45f4-a42f-3f01b33457eb@linaro.org> Date: Wed, 29 Nov 2023 21:14:50 +0000 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/15] clk: qcom: gpucc-sm6115: Unregister critical clocks Content-Language: en-US To: Konrad Dybcio , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20230717-topic-branch_aon_cleanup-v2-0-2a583460ef26@linaro.org> <20230717-topic-branch_aon_cleanup-v2-6-2a583460ef26@linaro.org> From: Bryan O'Donoghue In-Reply-To: <20230717-topic-branch_aon_cleanup-v2-6-2a583460ef26@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 29/11/2023 18:59, Konrad Dybcio wrote: > Some clocks need to be always-on, but we don't really do anything > with them, other than calling enable() once and telling Linux they're > enabled. > > Unregister them to save a couple of bytes and, perhaps more > importantly, allow for runtime suspend of the clock controller device, > as CLK_IS_CRITICAL prevents the latter. > > Signed-off-by: Konrad Dybcio > --- > drivers/clk/qcom/gpucc-sm6115.c | 33 +++------------------------------ > 1 file changed, 3 insertions(+), 30 deletions(-) > > diff --git a/drivers/clk/qcom/gpucc-sm6115.c b/drivers/clk/qcom/gpucc-sm6115.c > index fb71c21c9a89..93a50431aef8 100644 > --- a/drivers/clk/qcom/gpucc-sm6115.c > +++ b/drivers/clk/qcom/gpucc-sm6115.c > @@ -234,20 +234,6 @@ static struct clk_rcg2 gpu_cc_gx_gfx3d_clk_src = { > }, > }; > > -static struct clk_branch gpu_cc_ahb_clk = { > - .halt_reg = 0x1078, > - .halt_check = BRANCH_HALT_DELAY, > - .clkr = { > - .enable_reg = 0x1078, > - .enable_mask = BIT(0), > - .hw.init = &(struct clk_init_data){ > - .name = "gpu_cc_ahb_clk", > - .flags = CLK_IS_CRITICAL, > - .ops = &clk_branch2_ops, > - }, > - }, > -}; > - > static struct clk_branch gpu_cc_crc_ahb_clk = { > .halt_reg = 0x107c, > .halt_check = BRANCH_HALT_DELAY, > @@ -336,20 +322,6 @@ static struct clk_branch gpu_cc_cxo_clk = { > }, > }; > > -static struct clk_branch gpu_cc_gx_cxo_clk = { > - .halt_reg = 0x1060, > - .halt_check = BRANCH_HALT_DELAY, > - .clkr = { > - .enable_reg = 0x1060, > - .enable_mask = BIT(0), > - .hw.init = &(struct clk_init_data){ > - .name = "gpu_cc_gx_cxo_clk", > - .flags = CLK_IS_CRITICAL, > - .ops = &clk_branch2_ops, > - }, > - }, > -}; > - > static struct clk_branch gpu_cc_gx_gfx3d_clk = { > .halt_reg = 0x1054, > .halt_check = BRANCH_HALT_SKIP, > @@ -418,7 +390,6 @@ static struct gdsc gpu_gx_gdsc = { > }; > > static struct clk_regmap *gpu_cc_sm6115_clocks[] = { > - [GPU_CC_AHB_CLK] = &gpu_cc_ahb_clk.clkr, > [GPU_CC_CRC_AHB_CLK] = &gpu_cc_crc_ahb_clk.clkr, > [GPU_CC_CX_GFX3D_CLK] = &gpu_cc_cx_gfx3d_clk.clkr, > [GPU_CC_CX_GMU_CLK] = &gpu_cc_cx_gmu_clk.clkr, > @@ -426,7 +397,6 @@ static struct clk_regmap *gpu_cc_sm6115_clocks[] = { > [GPU_CC_CXO_AON_CLK] = &gpu_cc_cxo_aon_clk.clkr, > [GPU_CC_CXO_CLK] = &gpu_cc_cxo_clk.clkr, > [GPU_CC_GMU_CLK_SRC] = &gpu_cc_gmu_clk_src.clkr, > - [GPU_CC_GX_CXO_CLK] = &gpu_cc_gx_cxo_clk.clkr, OTOH. Seems a pity to remove these clocks - generally for the series I mean - from the debug view in /sys/kernel/debug/clk_summary. In the ideal case we have pm runtime functional without dropping these clocks from the view in /sys/kernel/debug/clk_summary. Certainly I've found that interface useful when launching a real product. It might be confusing to _not_ see the always-on clocks enumerated there. --- bod