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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDA4MDEyMiBTYWx0ZWRfXxt8SAJtQlyiF ujgy4V+RiOl1i4yh3uW+OSRVLCKQSmZnynb6JK79m86ZpK92O0VcAnMMI/yoSaGk22KAMC+SCxx 0kevhUpm+2m9eIlAsnnvbCihrRZFSKld9IUivZanj92+1QwN5zK9vhr7wPGxFLpCkBKXAOP1cJj jCsfSN73J6pB1tVSgrGw6TD85QaRwPS5WWv6Y+qhJAybYHS0r/hbabOjMRIGST0aERVMR5HVYgi OadnVFvn2gmfyzvO92G4Z0QwBuND+XbCtKji3K94KlnzXEx6dbDnTvfCEou4LYVPnE4RLkwSlA+ qyDOKnzIPWKuRZrWnKvsYQ5fMeQme5MqB8A7f8vGlKlK+l1uBVkznIBqt99qu/u8s1PEQf04nTt 55NpY5PYNbd7pz+noi+PNxKfxKL2Iw== X-Proofpoint-GUID: qeFOlam9VI17TfYI2umWman6POldg0re X-Proofpoint-ORIG-GUID: qeFOlam9VI17TfYI2umWman6POldg0re X-Authority-Analysis: v=2.4 cv=JPk2csKb c=1 sm=1 tr=0 ts=68e7be8e cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=EUspDBNiAAAA:8 a=_UWpYu-_HEzktCU8uygA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=HhbK4dLum7pmb74im6QT:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-09_04,2025-10-06_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510080122 Hi Eugen, On 9/25/2025 1:33 PM, Eugen Hristev wrote: > > > On 9/25/25 03:17, Jingyi Wang wrote: >> Enable more features on Kaanapali MTP boards including PMIC peripherals, >> bus, SDHCI, remoteprocs, USB, PCIE, WLAN and Bluetooth. >> >> Written with help from Jyothi Kumar Seerapu(added bus), Ronak Raheja >> (added USB), Manish Pandey(added SDHCI), Jishnu Prakash(added PMIC), >> Qiang Yu(added PCIE), Yijie Yang(Added WLAN) and Zijun Hu(Added Bluetooth). >> >> Signed-off-by: Jingyi Wang >> --- >> arch/arm64/boot/dts/qcom/kaanapali-mtp.dts | 663 +++++++++++++++++++++++++++++ >> 1 file changed, 663 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts >> index 9cf3158e2712..2949579481a9 100644 >> --- a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts >> +++ b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts >> @@ -5,9 +5,23 @@ >> ... >> + >> +&spmi_bus1 { >> + pmd8028: pmic@4 { >> + compatible = "qcom,pmd8028", "qcom,spmi-pmic"; >> + reg = <0x4 SPMI_USID>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + pmd8028_temp_alarm: temp-alarm@a00 { >> + compatible = "qcom,spmi-temp-alarm"; >> + reg = <0xa00>; >> + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; >> + #thermal-sensor-cells = <0>; >> + }; >> + >> + pmd8028_gpios: gpio@8800 { >> + compatible = "qcom,pmd8028-gpio", "qcom,spmi-gpio"; >> + reg = <0x8800>; >> + gpio-controller; >> + gpio-ranges = <&pmd8028_gpios 0 0 4>; >> + #gpio-cells = <2>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + }; >> + >> + pmih0108: pmic@7 { >> + compatible = "qcom,pmih0108", "qcom,spmi-pmic"; >> + reg = <0x7 SPMI_USID>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + pmih0108_temp_alarm: temp-alarm@a00 { >> + compatible = "qcom,spmi-temp-alarm"; >> + reg = <0xa00>; >> + interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; >> + #thermal-sensor-cells = <0>; >> + }; >> + >> + pmih0108_gpios: gpio@8800 { >> + compatible = "qcom,pmih0108-gpio", "qcom,spmi-gpio"; >> + reg = <0x8800>; >> + gpio-controller; >> + gpio-ranges = <&pmih0108_gpios 0 0 18>; >> + #gpio-cells = <2>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + >> + pmih0108_eusb2_repeater: phy@fd00 { >> + compatible = "qcom,pm8550b-eusb2-repeater"; >> + reg = <0xfd00>; >> + #phy-cells = <0>; >> + vdd18-supply = <&vreg_l15b_1p8>; >> + vdd3-supply = <&vreg_l5b_3p1>; >> + }; >> + }; >> + >> + pmr735d: pmic@a { > > Hi, > > The PMR735D is available in pmr735d_a.dtsi > > Can we find a way to reuse that include file instead of duplicating it > here ? In pmr735d_a.dtsi, the peripherals are added under the parent phandle "spmi_bus", which was commonly used in older SoCs having only a single bus under the PMIC arbiter, but in Kaanapali, there are two buses present under the PMIC arbiter, with phandles "spmi_bus0" and "spmi_bus1", so we cannot include the file as it is. Thanks, Jishnu > >> + compatible = "qcom,pmr735d", "qcom,spmi-pmic"; >> + reg = <0xa SPMI_USID>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + pmr735d_temp_alarm: temp-alarm@a00 { >> + compatible = "qcom,spmi-temp-alarm"; >> + reg = <0xa00>; >> + interrupts = <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; >> + #thermal-sensor-cells = <0>; >> + }; >> + >> + pmr735d_gpios: gpio@8800 { >> + compatible = "qcom,pmr735d-gpio", "qcom,spmi-gpio"; >> + reg = <0x8800>; >> + gpio-controller; >> + gpio-ranges = <&pmr735d_gpios 0 0 2>; >> + #gpio-cells = <2>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + }; >> + }; >> + > > > [...] >