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[109.252.159.193]) by smtp.googlemail.com with ESMTPSA id 38308e7fff4ca-3340a604c1dsm10279661fa.43.2025.08.16.07.36.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 16 Aug 2025 07:37:01 -0700 (PDT) Message-ID: <83755868-09b3-4bd1-8b40-0a4b9f497d2f@gmail.com> Date: Sat, 16 Aug 2025 17:36:58 +0300 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/5] gpu/drm: host1x: mipi: add Tegra20/Tegra30 MIPI calibration logic To: Svyatoslav Ryhel , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Mikko Perttunen Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org References: <20250717142139.57621-1-clamor95@gmail.com> <20250717142139.57621-4-clamor95@gmail.com> Content-Language: en-US From: Dmitry Osipenko In-Reply-To: <20250717142139.57621-4-clamor95@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 17.07.2025 17:21, Svyatoslav Ryhel пишет: > @@ -525,6 +599,14 @@ static int tegra_mipi_probe(struct platform_device *pdev) > return PTR_ERR(mipi->clk); > } > > + if (mipi->soc->dsi_v0) { > + mipi->csi_clk = devm_clk_get_prepared(&pdev->dev, "csi"); > + if (IS_ERR(mipi->csi_clk)) { Doesn't look like the clock needs to be prepared. Normally, you would need to have clock prepared if clock is enabled/disabled from a context that can't sleep, like under spinlock or in IRQ handler. AFAICT, this not the case here.