From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BC34267B6D; Tue, 1 Jul 2025 09:31:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751362264; cv=none; b=Bl8Hm1v5YLRCXtYzARm6aTiLgiYc08COBsZ2jyrvlyjVNwcDYnGJgrGV+cZOMugPQy81yytYdpa358P4+riU6pPfgYQjGVKOqdg0eWpKccIH50gRKH1Aw0hw78yeEeFdfwKLO48mYJSggROAMgFEM1G6YCwbJIAbaX5i0P3/0Cw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751362264; c=relaxed/simple; bh=ou1WGpY1B6KhDjtHPcrYf0u8zfiX7PXTX8+wLqltyZo=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=l02+3wgqchw15PgLvYqU4oSZhgXa465RWRD1lB8tnnk8aBNwGNJFfaxu7G1W/6NTQpCj4oOuxMPi6QENH8AMx2u5jbJfrpKImZptjI09w8JhvnzrZEA0F9XbL0gqETDfjoNXd6HRP008FJmXL9PFbt2bLeZngeoj+QZs4v5sTKY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZkCn6cGQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZkCn6cGQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F230CC4CEEB; Tue, 1 Jul 2025 09:30:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751362263; bh=ou1WGpY1B6KhDjtHPcrYf0u8zfiX7PXTX8+wLqltyZo=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=ZkCn6cGQ+UG8FpUa2F/+hEfGTKsRCB7Kc5gGqSFd09vvCmP32SbyiUljPX7CegrrL 1Z5T5uW+YSvvbUNCkRwvnKPhVjyrXADRSJW2SwfC0Lk/R8iRjB6eBe1oIIVEkSIgKH rP2IYyAZQ8jC34htfOcR2sc0SOjDYe1UYAytJuFIk+U2ZwxMJuFwBlZS6k7DS2+tav piyZn0UD6Xs3qwbGAjEcDoYbacKfr1ATjOeNLHZNPDlbXJNwsn/fyplHKjT7Qdls6a 1FC+Z/AFQPVD7ghnuY/GePbSZwKzyqx5eYNnthZWS90l+ouDLGKYid3RmNi6/GZYvm Fq2emaLk0qV5g== Message-ID: <83f88dd5-8c74-4c2f-b94e-6c16dcbd44f1@kernel.org> Date: Tue, 1 Jul 2025 11:30:53 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V3 2/4] dt-bindings: mmc: controller: Add max-sd-hs-frequency property To: Konrad Dybcio , Sarthak Garg , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Adrian Hunter Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_cang@quicinc.com, quic_nguyenb@quicinc.com, quic_rampraka@quicinc.com, quic_pragalla@quicinc.com, quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com, quic_bhaskarv@quicinc.com, kernel@oss.qualcomm.com References: <20250618072818.1667097-1-quic_sartgarg@quicinc.com> <20250618072818.1667097-3-quic_sartgarg@quicinc.com> <6040afd9-a2a8-49f0-85e9-95257b938156@kernel.org> <9627ed6f-2bb8-40b0-b647-5f659d87f2f9@oss.qualcomm.com> <5bdae07b-a7b1-49be-b843-1704981bc63b@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 01/07/2025 11:04, Konrad Dybcio wrote: >>>>> >>>>> Looking at the docs, a number of platforms have various limitations >>>>> with regards to frequency at specific speed-modes, some of which seem >>>>> to be handled implicitly by rounding in the clock framework's >>>>> round/set_rate(). >>>>> >>>>> I can very easily imagine there are either boards or platforms in the >>>>> wild, where the speed must be limited for various reasons, maybe some >>>>> of them currently don't advertise it (like sm8550 on next/master) to >>>>> hide that >>>> >>>> But there are no such now. The only argument (fact) provided in this >>>> patchset is: this is issue specific to SM8550 SoC, not the board. See >>>> last patch. Therefore this is compatible-deducible and this makes >>>> property without any upstream user. >>> >>> When one appears, we will have to carry code to repeat what the property >>> does, based on a specific compatible.. And all OS implementations will >>> have to do the same, instead of parsing the explicit information >> >> Adding new property in such case will be trivial and simple, unlike >> having to maintain unused ABI. >> >> And it will be unused, because last patch DTS should be rejected on that >> basis: adding redundant properties which are already defined by the >> compatible. > > Got some more fresh information.. This apparently *does* vary across > boards, as there is a recommended hardware workaround to this rate > limitation (requiring an external clock source, which is up to the > OEM to implement or not) This should be clearly explained in commit msg and the DTS patch re-written because it seems it is not a property of the SoC. I mean, really, that last patch here makes entire discussion pointless, because till it is in the patchset is a proof this is a SoC level property. Best regards, Krzysztof