[PATCH v2 0/2] Add scmi powerdomain for sky1

[PATCH v2 0/2] Add scmi powerdomain for sky1

[Gary Yang]

v2 changes:
- Pass dts build check with below commands:
make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-pci-host.yaml
make O=$OUTKNL CHECK_DTBS=y W=1 cix/sky1-orion-o6.dtb
scripts/checkpatch.pl 000*.patch
- update dt-bindings

Gary Yang (2):
  dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings
  arm64: dts: cix: Add scmi powerdomain nodes for sky1

 .../bindings/pci/cix,sky1-pcie-host.yaml      |  6 ++++
 arch/arm64/boot/dts/cix/sky1-power.h          | 34 +++++++++++++++++++
 arch/arm64/boot/dts/cix/sky1.dtsi             | 22 ++++++++++++
 3 files changed, 62 insertions(+)
 create mode 100644 arch/arm64/boot/dts/cix/sky1-power.h

-- 
2.49.0

[PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Gary Yang]

add power-domains and power-domain-names property

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
---
 .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
index b910a42e0843..1d8ee8310588 100644
--- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
@@ -38,6 +38,12 @@ properties:
   ranges:
     maxItems: 3
 
+  power-domains:
+    minItems: 1
+
+  power-domain-names:
+    minItems: 1
+
 required:
   - compatible
   - ranges
-- 
2.49.0

Re: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Krzysztof Kozlowski]

On 10/03/2026 07:53, Gary Yang wrote:
> add power-domains and power-domain-names property

Why? Please write complete sentences explaining why you are doing this.

> 
> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> ---
>  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> index b910a42e0843..1d8ee8310588 100644
> --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> @@ -38,6 +38,12 @@ properties:
>    ranges:
>      maxItems: 3
>  
> +  power-domains:
> +    minItems: 1
> +
> +  power-domain-names:
> +    minItems: 1

There is no such syntax. Open any existing bindinh.

Best regards,
Krzysztof

回复: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Gary Yang]

Hi Krzysztof:

Thanks for your comments

> EXTERNAL EMAIL
> 
> On 10/03/2026 07:53, Gary Yang wrote:
> > add power-domains and power-domain-names property
> 
> Why? Please write complete sentences explaining why you are doing this.
> 

Sorry, I did not describe in detail.

The Sky1 PCIe controller sits in a power domain that must be enabled before the controller can be accessed.
Describe the power-domains property so that DTS files can reference the correct power domain provider.

> >
> > Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> > ---
> >  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > index b910a42e0843..1d8ee8310588 100644
> > --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > @@ -38,6 +38,12 @@ properties:
> >    ranges:
> >      maxItems: 3
> >
> > +  power-domains:
> > +    minItems: 1
> > +
> > +  power-domain-names:
> > +    minItems: 1
> 
> There is no such syntax. Open any existing bindinh.
> 

Sorry, They come from Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml

Execute the two commands below before submit patch every time.

make O=$OUTKNL dt_binding_check
make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-pcie-host.yaml

we don't find any warning or error. So we think all is ok.

DTEX    Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dts
DTC [C] Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb

and

CHKDT   ./Documentation/devicetree/bindings
LINT    ./Documentation/devicetree/bindings
DTEX    Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dts
DTC [C] Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.example.dtb

If take any mistakes and miss any information, please let us know.

Best Ragards
Gary

> Best regards,
> Krzysztof

Re: 回复: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Krzysztof Kozlowski]

On 11/03/2026 03:31, Gary Yang wrote:
> Hi Krzysztof:
> 
> Thanks for your comments
> 
>> EXTERNAL EMAIL
>>
>> On 10/03/2026 07:53, Gary Yang wrote:
>>> add power-domains and power-domain-names property
>>
>> Why? Please write complete sentences explaining why you are doing this.
>>
> 
> Sorry, I did not describe in detail.
> 
> The Sky1 PCIe controller sits in a power domain that must be enabled before the controller can be accessed.
> Describe the power-domains property so that DTS files can reference the correct power domain provider.
> 
>>>
>>> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
>>> ---
>>>  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
>>>  1 file changed, 6 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
>> b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
>>> index b910a42e0843..1d8ee8310588 100644
>>> --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
>>> @@ -38,6 +38,12 @@ properties:
>>>    ranges:
>>>      maxItems: 3
>>>
>>> +  power-domains:
>>> +    minItems: 1
>>> +
>>> +  power-domain-names:
>>> +    minItems: 1
>>
>> There is no such syntax. Open any existing bindinh.
>>
> 
> Sorry, They come from Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml

There is no such syntax there.

Just open the file.


> 
> Execute the two commands below before submit patch every time.
> 
> make O=$OUTKNL dt_binding_check
> make O=$OUTKNL dt_binding_check DT_SCHEMA_FILES=cix,sky1-pcie-host.yaml
> 
> we don't find any warning or error. So we think all is ok.

No, because there is no such code nowhere. Please take other bindings as
an example. You miss here maxItems.

Best regards,
Krzysztof

回复: 回复: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Gary Yang]

Hi Krzysztof:

Thanks for your comments

> EXTERNAL EMAIL
> 
> On 11/03/2026 03:31, Gary Yang wrote:
> > Hi Krzysztof:
> >
> > Thanks for your comments
> >
> >> EXTERNAL EMAIL
> >>
> >> On 10/03/2026 07:53, Gary Yang wrote:
> >>> add power-domains and power-domain-names property
> >>
> >> Why? Please write complete sentences explaining why you are doing this.
> >>
> >
> > Sorry, I did not describe in detail.
> >
> > The Sky1 PCIe controller sits in a power domain that must be enabled before
> the controller can be accessed.
> > Describe the power-domains property so that DTS files can reference the
> correct power domain provider.
> >
> >>>
> >>> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> >>> ---
> >>>  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
> >>>  1 file changed, 6 insertions(+)
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> >> b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> >>> index b910a42e0843..1d8ee8310588 100644
> >>> --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> >>> +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> >>> @@ -38,6 +38,12 @@ properties:
> >>>    ranges:
> >>>      maxItems: 3
> >>>
> >>> +  power-domains:
> >>> +    minItems: 1
> >>> +
> >>> +  power-domain-names:
> >>> +    minItems: 1
> >>
> >> There is no such syntax. Open any existing bindinh.
> >>
> >
> > Sorry, They come from
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
> 
> There is no such syntax there.
> 
> Just open the file.
> 

Maybe we see it from the different views. Anyway, it's not important.
Do you agree this scheme? Like this:
  power-domains:
    maxItems: 1
  power-domain-names:
    maxItems: 1

> 
> >
> > Execute the two commands below before submit patch every time.
> >
> > make O=$OUTKNL dt_binding_check
> > make O=$OUTKNL dt_binding_check
> > DT_SCHEMA_FILES=cix,sky1-pcie-host.yaml
> >
> > we don't find any warning or error. So we think all is ok.
> 
> No, because there is no such code nowhere. Please take other bindings as an
> example. You miss here maxItems.
> 

Ok, thanks for your kindly remind. We get it.
Thanks for your suggestions

Best regards
Gary

> Best regards,
> Krzysztof

Re: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Bjorn Helgaas]

Re the subject, every patch is an update.  Can you include something
about the *content* of the change?

Also run "git log --oneline Documentation/devicetree/bindings/pci/"
and make yours match.  In this case, something like:

  dt-bindings: PCI: cix,sky1-pcie-host: Add power-domains

On Tue, Mar 10, 2026 at 02:53:37PM +0800, Gary Yang wrote:
> add power-domains and power-domain-names property
> 
> Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> ---
>  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> index b910a42e0843..1d8ee8310588 100644
> --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> @@ -38,6 +38,12 @@ properties:
>    ranges:
>      maxItems: 3
>  
> +  power-domains:
> +    minItems: 1
> +
> +  power-domain-names:
> +    minItems: 1
> +
>  required:
>    - compatible
>    - ranges
> -- 
> 2.49.0
> 

回复: [PATCH v2 1/2] dt-bindings: PCI: update CIX Sky1 PCIe Root Complex bindings

[Gary Yang]

Hi Bjorn:

Thanks for your comments

> 
> EXTERNAL EMAIL
> 
> Re the subject, every patch is an update.  Can you include something about
> the *content* of the change?
> 
> Also run "git log --oneline Documentation/devicetree/bindings/pci/"
> and make yours match.  In this case, something like:
> 
>   dt-bindings: PCI: cix,sky1-pcie-host: Add power-domains
> 

OK, Thanks for your kindly remind. We will fix it next version.

Best Regards
Gary

> On Tue, Mar 10, 2026 at 02:53:37PM +0800, Gary Yang wrote:
> > add power-domains and power-domain-names property
> >
> > Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> > ---
> >  .../devicetree/bindings/pci/cix,sky1-pcie-host.yaml         | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > index b910a42e0843..1d8ee8310588 100644
> > --- a/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > +++ b/Documentation/devicetree/bindings/pci/cix,sky1-pcie-host.yaml
> > @@ -38,6 +38,12 @@ properties:
> >    ranges:
> >      maxItems: 3
> >
> > +  power-domains:
> > +    minItems: 1
> > +
> > +  power-domain-names:
> > +    minItems: 1
> > +
> >  required:
> >    - compatible
> >    - ranges
> > --
> > 2.49.0
> >

[PATCH v2 2/2] arm64: dts: cix: Add scmi powerdomain nodes for sky1

[Gary Yang]

Add a second SCMI channel using SMC transport to communicate with TF-A
for power domain management on the Sky1 SoC.

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
---
 arch/arm64/boot/dts/cix/sky1-power.h | 34 ++++++++++++++++++++++++++++
 arch/arm64/boot/dts/cix/sky1.dtsi    | 22 ++++++++++++++++++
 2 files changed, 56 insertions(+)
 create mode 100644 arch/arm64/boot/dts/cix/sky1-power.h

diff --git a/arch/arm64/boot/dts/cix/sky1-power.h b/arch/arm64/boot/dts/cix/sky1-power.h
new file mode 100644
index 000000000000..743c0e5558ee
--- /dev/null
+++ b/arch/arm64/boot/dts/cix/sky1-power.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright 2026 Cix Technology Group Co., Ltd.
+ */
+
+#ifndef __SKY1_POWER_H__
+#define __SKY1_POWER_H__
+
+/* The Rich OS need flow the macro */
+#define SKY1_PD_AUDIO		0
+#define SKY1_PD_PCIE_CTRL0	1
+#define SKY1_PD_PCIE_DUMMY	2
+#define SKY1_PD_PCIEHUB		3
+#define SKY1_PD_MMHUB		4
+#define SKY1_PD_MMHUB_SMMU	5
+#define SKY1_PD_DPU0		6
+#define SKY1_PD_DPU1		7
+#define SKY1_PD_DPU2		8
+#define SKY1_PD_DPU3		9
+#define SKY1_PD_DPU4		10
+#define SKY1_PD_VPU_TOP		11
+#define SKY1_PD_VPU_CORE0	12
+#define SKY1_PD_VPU_CORE1	13
+#define SKY1_PD_VPU_CORE2	14
+#define SKY1_PD_VPU_CORE3	15
+#define SKY1_PD_NPU_CORE0	16
+#define SKY1_PD_NPU_CORE1	17
+#define SKY1_PD_NPU_CORE2	18
+#define SKY1_PD_NPU_TOP		19
+#define SKY1_PD_ISP0		20
+#define SKY1_PD_GPU		21
+#define SKY1_PD_MAX		22
+
+#endif
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 64b76905cbff..1c8419ba886e 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -6,6 +6,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/cix,sky1.h>
+#include "sky1-power.h"
 
 / {
 	interrupt-parent = <&gic>;
@@ -168,6 +169,19 @@ scmi_clk: protocol@14 {
 				#clock-cells = <1>;
 			};
 		};
+
+		ap_to_tfa_scmi: scmi-1 {
+			compatible = "arm,scmi-smc";
+			arm,smc-id = <0xc2000001>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			shmem = <&ap_tfa_scmi_mem>;
+
+			smc_devpd: protocol@11 {
+				reg = <0x11>;
+				#power-domain-cells = <1>;
+			};
+		};
 	};
 
 	pmu-a520 {
@@ -428,6 +442,8 @@ pcie_x8_rc: pcie@a010000 {
 			#size-cells = <2>;
 			bus-range = <0xc0 0xff>;
 			device_type = "pci";
+			power-domains = <&smc_devpd SKY1_PD_PCIE_CTRL0>;
+			power-domain-names = "pcie_pd";
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 0x7>;
 			interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -572,6 +588,12 @@ iomuxc_s5: pinctrl@16007000 {
 			compatible = "cix,sky1-pinctrl-s5";
 			reg = <0x0 0x16007000 0x0 0x1000>;
 		};
+
+		ap_tfa_scmi_mem: shmem@84380000 {
+			compatible = "arm,scmi-shmem";
+			reg = <0x0 0x84380000 0x0 0x80>;
+			reg-io-width = <4>;
+		};
 	};
 
 	timer {
-- 
2.49.0