From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E01C1335BBE for ; Mon, 18 Aug 2025 13:48:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755524940; cv=none; b=l8tK6JIgxIVfwa5kXPdfRisrJuwpHMSl0KwQM0Pf2NMA266TebPYyY9OKMdYiAzSjuYf8cT3O+dOpoLc5q5Ph6MhsJfd7Hq63QIx1Cr5r8ftgjgoJP67uSIFw7AJHZUBP1L4/8weW/PQ2+KsmtV1BB32jVozeo/NbOy608djdP4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1755524940; c=relaxed/simple; bh=Iq41YliHm0d8n8rWWR3bza0G/ceeGQ4+coO+hydkSXs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=rmautl1e5uzDRf1Mi2JQYhN2MT1zjWSkl3z8v1w3hCKX4TeN3R4Gn5oiYbNRyzEEvVRU0HRMBtdDgEN29WCLLQRSBBH8UBNuCi9k4k6CwuMg/tBUcSgfregr7yF0uLDf8QRBV+j6+eM4FhTAr5pDhn94Bq79lE3gAsEedE/RC6o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=HPNJqgXd; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="HPNJqgXd" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-3b9df0bffc3so2886736f8f.1 for ; Mon, 18 Aug 2025 06:48:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1755524937; x=1756129737; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=Sh+bHoKKtm/hsPtjkx/NyjNhDEo2COTVB4L7LsR7sJ4=; b=HPNJqgXdAJU7G6N3CBwRg5bE1IrspC8AyG4V1Xd04ZTS0q+WVCV2Uqdj3cePJGvh2M jKQ+UaEJUR1vhSpNtcdAJ5kzeu4IcqXysa+/v5SinH/FAJRH9khJxVXas0B2N8eYXFri FFMmz9STTViKkJCL0bG4AKLkdSYi552lAw0bmELSt8qzjKWNKDrk0tjCG0KZ9Ie428h7 E247CYTUWBV2afJtmLR9+ni0nyLLw+TaJyIkHbzo55VeI+0CQuuuShvlibqwYrhxM+4E l54JcQsDSCY/gBPro51+QVxeAQx+6DdauLljn8UCznKvDq5oRzFcyvdwDohlhp4vVvCk pIgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1755524937; x=1756129737; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=Sh+bHoKKtm/hsPtjkx/NyjNhDEo2COTVB4L7LsR7sJ4=; b=gHGcte9newIboBCeygxi36U9gdhQ8HzT8s9VzX7ADn1FDaO/nQig+4LcSs8rATuJbr MAzUXJKGQ8mD3TaHjKq5bWH8Vi+svqfM1KclCW9cYKzCds2HgzFxvQ82PjILFL+CAUpC Ely2fiZDBlZtuzkzNZLhjrsKMXNhxjMbuSthRvvdSG7hUlJYyaAQQPFG+7j0u9ueBqz3 7seEKPvh8CpmG+3/rmhSEKBjeBpJpYNBiHlYXmFWYa6eQbqMTHyyAt5zcuiG3x9eKdJS kJbtmaLI5eMv1Ycl5mY/DKQte8rLQal2t15dyGZlTmpYv6V3cPwqc692v8AC4fEQOren 2i/g== X-Forwarded-Encrypted: i=1; AJvYcCX6rD/8UpB3dAT1awywjBhXRcHnk0wDzl0GX0FT9WifyONKM3mXNwiNMSmy25zM2NZa7Z7xWaQsQwP3@vger.kernel.org X-Gm-Message-State: AOJu0YwlX9JfsM5WmV+iR3UldZ4q4R2pjhuk9MfJI0chEkEtPuL9aotZ I0vPW0PVX2HwauKaXkBJ/5hX/IEPtXuPgWycmiYs8JvhxQnPwGSaga1Nr/nUlNUF7nI= X-Gm-Gg: ASbGncuCoU5+55CpOcR/BYIbWVdO4q28hgoWVC1Oc9gdWqvg6BzkrO2y3b3kNsDexXa edK8DjF7wlVtCVR7pFBtVO0VSiEBlEjq4PGY5/rvMJ3DSHLswNsr3Od/0upbJUT7twoPOA40n/u Wps5ZdVTAbQvWHi/9ixzrKn2H870CqfAHp74+d6FsFlhBFmugsEKXZlKuhz4Azr6XNkaXmBACMF 5whoGnrFmxjH8QYAUuvjwOCy5RcxeCqeGmoXC1iYaExqeQ7c1RGcGMW2XKunxtE7moa8HcC07BZ VFKGrAiqEVb9ya17AdK73Jc/ew2Sm8B1WHVpSL5ge1rFiwHDHhuo0wESpVOWD76Ef0edZoXH72L lWQGPPBhuLnbU4N6ivUybl7Gshq8= X-Google-Smtp-Source: AGHT+IEKz79YyPVBfJQGlFogDcQJMYXgYE5WI5cAwBE2CTscdIWf8BDHmqXB1zUVqxIISepL6GSx+Q== X-Received: by 2002:a05:6000:430c:b0:3b7:8984:5134 with SMTP id ffacd0b85a97d-3bb66a3b2ddmr9157492f8f.16.1755524936995; Mon, 18 Aug 2025 06:48:56 -0700 (PDT) Received: from [192.168.1.3] ([185.48.76.109]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3bc5e232534sm10573878f8f.24.2025.08.18.06.48.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 Aug 2025 06:48:56 -0700 (PDT) Message-ID: <84498b4b-9023-4a39-bc75-d2b7a495821f@linaro.org> Date: Mon, 18 Aug 2025 14:48:54 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/13] spi: spi-fsl-lpspi: Enumerate all pin configuration definitions To: Frank Li Cc: Mark Brown , Clark Wang , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Larisa Grigore , Larisa Grigore , Ghennadi Procopciuc , Ciprianmarian Costea , s32@nxp.com, linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20250814-james-nxp-lpspi-v1-0-9586d7815d14@linaro.org> <20250814-james-nxp-lpspi-v1-5-9586d7815d14@linaro.org> Content-Language: en-US From: James Clark In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 14/08/2025 7:10 pm, Frank Li wrote: > On Thu, Aug 14, 2025 at 05:06:45PM +0100, James Clark wrote: >> Add all the possible options, use names more similar to the reference > > Add all the possible pincfg options, > >> manual and convert _OFFSET to _MASK so we can use FIELD_PREP() and >> FIELD_FITS() macros etc. >> >> This will make it slightly easier to add a DT property for this in the >> next commit. > > Make it slightly easier to add a DT property ... > > No funtionality change. > Ack >> >> Signed-off-by: James Clark >> --- >> drivers/spi/spi-fsl-lpspi.c | 21 +++++++++++++++------ >> 1 file changed, 15 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c >> index 79b170426bee..816e48bbc810 100644 >> --- a/drivers/spi/spi-fsl-lpspi.c >> +++ b/drivers/spi/spi-fsl-lpspi.c >> @@ -69,7 +69,11 @@ >> #define DER_RDDE BIT(1) >> #define DER_TDDE BIT(0) >> #define CFGR1_PCSCFG BIT(27) >> -#define CFGR1_PINCFG (BIT(24)|BIT(25)) >> +#define CFGR1_PINCFG_MASK GENMASK(25, 24) >> +#define CFGR1_PINCFG_SIN_IN_SOUT_OUT 0 >> +#define CFGR1_PINCFG_SIN_ONLY 1 >> +#define CFGR1_PINCFG_SOUT_ONLY 2 >> +#define CFGR1_PINCFG_SOUT_IN_SIN_OUT 3 >> #define CFGR1_PCSPOL_MASK GENMASK(11, 8) >> #define CFGR1_NOSTALL BIT(3) >> #define CFGR1_HOST BIT(0) >> @@ -411,8 +415,9 @@ static int fsl_lpspi_dma_configure(struct spi_controller *controller) >> >> static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) >> { >> - u32 temp; >> + u32 temp = 0; >> int ret; >> + u8 pincfg; >> >> if (!fsl_lpspi->is_target) { >> ret = fsl_lpspi_set_bitrate(fsl_lpspi); >> @@ -422,10 +427,14 @@ static int fsl_lpspi_config(struct fsl_lpspi_data *fsl_lpspi) >> >> fsl_lpspi_set_watermark(fsl_lpspi); >> >> - if (!fsl_lpspi->is_target) >> - temp = CFGR1_HOST; >> - else >> - temp = CFGR1_PINCFG; >> + if (!fsl_lpspi->is_target) { >> + temp |= CFGR1_HOST; >> + pincfg = CFGR1_PINCFG_SIN_IN_SOUT_OUT; >> + } else { >> + pincfg = CFGR1_PINCFG_SOUT_IN_SIN_OUT; >> + } >> + temp |= FIELD_PREP(CFGR1_PINCFG_MASK, pincfg); >> + >> if (fsl_lpspi->config.mode & SPI_CS_HIGH) >> temp |= FIELD_PREP(CFGR1_PCSPOL_MASK, >> BIT(fsl_lpspi->config.chip_select)); >> >> -- >> 2.34.1 >>