* [PATCH 0/2]] Enable crypto for ipq9574 @ 2023-05-12 9:01 Anusha Rao 2023-05-12 9:01 ` [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks Anusha Rao 2023-05-12 9:01 ` [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes Anusha Rao 0 siblings, 2 replies; 7+ messages in thread From: Anusha Rao @ 2023-05-12 9:01 UTC (permalink / raw) To: agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh Update GCC driver to include clocks required for crypto. Enable crypto nodes in ipq9574. DTS patch depends on the below series https://lore.kernel.org/linux-arm-msm/20230329053726.14860-1-quic_kathirav@quicinc.com/ Anusha Rao (2): clk: qcom: gcc-ipq9574: Enable crypto clocks arm64: dts: qcom: ipq9574: Enable crypto nodes arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++ drivers/clk/qcom/gcc-ipq9574.c | 72 ++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++ include/dt-bindings/reset/qcom,ipq9574-gcc.h | 2 +- 4 files changed, 97 insertions(+), 1 deletion(-) base-commit: aabe491169befbe5481144acf575a0260939764a -- 2.17.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks 2023-05-12 9:01 [PATCH 0/2]] Enable crypto for ipq9574 Anusha Rao @ 2023-05-12 9:01 ` Anusha Rao 2023-05-12 9:20 ` Krzysztof Kozlowski 2023-05-12 9:01 ` [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes Anusha Rao 1 sibling, 1 reply; 7+ messages in thread From: Anusha Rao @ 2023-05-12 9:01 UTC (permalink / raw) To: agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh Enable the clocks required for crypto operation. Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> --- drivers/clk/qcom/gcc-ipq9574.c | 72 ++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++ include/dt-bindings/reset/qcom,ipq9574-gcc.h | 2 +- 3 files changed, 77 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c index 7b0505f5c255..b203e7aae145 100644 --- a/drivers/clk/qcom/gcc-ipq9574.c +++ b/drivers/clk/qcom/gcc-ipq9574.c @@ -728,6 +728,41 @@ static struct clk_rcg2 blsp1_uart6_apps_clk_src = { }, }; +static const struct freq_tbl ftbl_crypto_clk_src[] = { + F(160000000, P_GPLL0, 5, 0, 0), + { } +}; + +static struct clk_rcg2 crypto_clk_src = { + .cmd_rcgr = 0x16004, + .freq_tbl = ftbl_crypto_clk_src, + .hid_width = 5, + .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, + .clkr.hw.init = &(const struct clk_init_data) { + .name = "crypto_clk_src", + .parent_data = gcc_xo_gpll0_gpll0_out_main_div2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0_gpll0_out_main_div2), + .ops = &clk_rcg2_ops, + }, +}; + +static struct clk_branch gcc_crypto_clk = { + .halt_reg = 0x1600c, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0x0b004, + .enable_mask = BIT(14), + .hw.init = &(const struct clk_init_data) { + .name = "gcc_crypto_clk", + .parent_hws = (const struct clk_hw *[]) { + &crypto_clk_src.clkr.hw }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_apss_ahb_clk = { .halt_reg = 0x24018, .halt_check = BRANCH_HALT_VOTED, @@ -2071,6 +2106,38 @@ static struct clk_rcg2 pcnoc_bfdcd_clk_src = { }, }; +static struct clk_branch gcc_crypto_axi_clk = { + .halt_reg = 0x16010, + .clkr = { + .enable_reg = 0x16010, + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data) { + .name = "gcc_crypto_axi_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcnoc_bfdcd_clk_src.clkr.hw }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + +static struct clk_branch gcc_crypto_ahb_clk = { + .halt_reg = 0x16014, + .clkr = { + .enable_reg = 0x16014, + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data) { + .name = "gcc_crypto_ahb_clk", + .parent_hws = (const struct clk_hw *[]) { + &pcnoc_bfdcd_clk_src.clkr.hw }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_nsscfg_clk = { .halt_reg = 0x1702c, .clkr = { @@ -4036,6 +4103,10 @@ static struct clk_regmap *gcc_ipq9574_clks[] = { [GCC_SNOC_PCIE1_1LANE_S_CLK] = &gcc_snoc_pcie1_1lane_s_clk.clkr, [GCC_SNOC_PCIE2_2LANE_S_CLK] = &gcc_snoc_pcie2_2lane_s_clk.clkr, [GCC_SNOC_PCIE3_2LANE_S_CLK] = &gcc_snoc_pcie3_2lane_s_clk.clkr, + [CRYPTO_CLK_SRC] = &crypto_clk_src.clkr, + [GCC_CRYPTO_CLK] = &gcc_crypto_clk.clkr, + [GCC_CRYPTO_AXI_CLK] = &gcc_crypto_axi_clk.clkr, + [GCC_CRYPTO_AHB_CLK] = &gcc_crypto_ahb_clk.clkr, }; static const struct qcom_reset_map gcc_ipq9574_resets[] = { @@ -4193,6 +4264,7 @@ static const struct qcom_reset_map gcc_ipq9574_resets[] = { [GCC_WCSS_ECAHB_ARES] = { 0x25070, 0 }, [GCC_WCSS_Q6_BCR] = { 0x18000, 0 }, [GCC_WCSS_Q6_TBU_BCR] = { 0x12054, 0 }, + [GCC_CRYPTO_BCR] = { 0x16000, 0 }, }; static const struct of_device_id gcc_ipq9574_match_table[] = { diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bindings/clock/qcom,ipq9574-gcc.h index 5a2961bfe893..86790efa10f0 100644 --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h @@ -210,4 +210,8 @@ #define GCC_SNOC_PCIE1_1LANE_S_CLK 201 #define GCC_SNOC_PCIE2_2LANE_S_CLK 202 #define GCC_SNOC_PCIE3_2LANE_S_CLK 203 +#define CRYPTO_CLK_SRC 204 +#define GCC_CRYPTO_CLK 205 +#define GCC_CRYPTO_AXI_CLK 206 +#define GCC_CRYPTO_AHB_CLK 207 #endif diff --git a/include/dt-bindings/reset/qcom,ipq9574-gcc.h b/include/dt-bindings/reset/qcom,ipq9574-gcc.h index d01dc6a24cf1..5bcf077413ba 100644 --- a/include/dt-bindings/reset/qcom,ipq9574-gcc.h +++ b/include/dt-bindings/reset/qcom,ipq9574-gcc.h @@ -160,5 +160,5 @@ #define GCC_WCSS_Q6_BCR 151 #define GCC_WCSS_Q6_TBU_BCR 152 #define GCC_TCSR_BCR 153 - +#define GCC_CRYPTO_BCR 154 #endif -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks 2023-05-12 9:01 ` [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks Anusha Rao @ 2023-05-12 9:20 ` Krzysztof Kozlowski 2023-05-15 7:12 ` Anusha Canchi 0 siblings, 1 reply; 7+ messages in thread From: Krzysztof Kozlowski @ 2023-05-12 9:20 UTC (permalink / raw) To: Anusha Rao, agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh On 12/05/2023 11:01, Anusha Rao wrote: > Enable the clocks required for crypto operation. > > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > --- > drivers/clk/qcom/gcc-ipq9574.c | 72 ++++++++++++++++++++ > include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++ > include/dt-bindings/reset/qcom,ipq9574-gcc.h | 2 +- Bindings are always separate patches. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks 2023-05-12 9:20 ` Krzysztof Kozlowski @ 2023-05-15 7:12 ` Anusha Canchi 0 siblings, 0 replies; 7+ messages in thread From: Anusha Canchi @ 2023-05-15 7:12 UTC (permalink / raw) To: Krzysztof Kozlowski, agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh On 5/12/2023 2:50 PM, Krzysztof Kozlowski wrote: > On 12/05/2023 11:01, Anusha Rao wrote: >> Enable the clocks required for crypto operation. >> >> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> >> --- >> drivers/clk/qcom/gcc-ipq9574.c | 72 ++++++++++++++++++++ >> include/dt-bindings/clock/qcom,ipq9574-gcc.h | 4 ++ >> include/dt-bindings/reset/qcom,ipq9574-gcc.h | 2 +- > Bindings are always separate patches. Okay, will address in the next spin. Thanks, Anusha > > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes 2023-05-12 9:01 [PATCH 0/2]] Enable crypto for ipq9574 Anusha Rao 2023-05-12 9:01 ` [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks Anusha Rao @ 2023-05-12 9:01 ` Anusha Rao 2023-05-12 9:22 ` Krzysztof Kozlowski 1 sibling, 1 reply; 7+ messages in thread From: Anusha Rao @ 2023-05-12 9:01 UTC (permalink / raw) To: agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh Enable crypto support for ipq9574. Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index fea15f3cf910..3cda5aa8d03c 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -123,6 +123,26 @@ clock-names = "core"; }; + cryptobam: dma-controller@704000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x00704000 0x20000>; + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <1>; + qcom,controlled-remotely; + }; + + crypto: crypto@73a000 { + compatible = "qcom,crypto-v5.1"; + reg = <0x0073a000 0x6000>; + clocks = <&gcc GCC_CRYPTO_AHB_CLK>, + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_CLK>; + clock-names = "iface", "bus", "core"; + dmas = <&cryptobam 2>, <&cryptobam 3>; + dma-names = "rx", "tx"; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,ipq9574-tlmm"; reg = <0x01000000 0x300000>; -- 2.17.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes 2023-05-12 9:01 ` [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes Anusha Rao @ 2023-05-12 9:22 ` Krzysztof Kozlowski 2023-05-15 7:28 ` Anusha Canchi 0 siblings, 1 reply; 7+ messages in thread From: Krzysztof Kozlowski @ 2023-05-12 9:22 UTC (permalink / raw) To: Anusha Rao, agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh On 12/05/2023 11:01, Anusha Rao wrote: > Enable crypto support for ipq9574. > > Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> > --- > arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > index fea15f3cf910..3cda5aa8d03c 100644 > --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > @@ -123,6 +123,26 @@ > clock-names = "core"; > }; > > + cryptobam: dma-controller@704000 { > + compatible = "qcom,bam-v1.7.0"; > + reg = <0x00704000 0x20000>; > + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; > + #dma-cells = <1>; > + qcom,ee = <1>; > + qcom,controlled-remotely; > + }; > + > + crypto: crypto@73a000 { > + compatible = "qcom,crypto-v5.1"; This compatible is deprecated. Take a look at the bindings - I think you miss bindings for your SoC, which you should then use here. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes 2023-05-12 9:22 ` Krzysztof Kozlowski @ 2023-05-15 7:28 ` Anusha Canchi 0 siblings, 0 replies; 7+ messages in thread From: Anusha Canchi @ 2023-05-15 7:28 UTC (permalink / raw) To: Krzysztof Kozlowski, agross, andersson, konrad.dybcio, robh+dt, krzysztof.kozlowski+dt, conor+dt, mturquette, sboyd, p.zabel, linux-arm-msm, devicetree, linux-kernel, linux-clk Cc: quic_srichara, quic_gokulsri, quic_sjaganat, quic_kathirav, quic_arajkuma, quic_poovendh On 5/12/2023 2:52 PM, Krzysztof Kozlowski wrote: > On 12/05/2023 11:01, Anusha Rao wrote: >> Enable crypto support for ipq9574. >> >> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >> index fea15f3cf910..3cda5aa8d03c 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi >> @@ -123,6 +123,26 @@ >> clock-names = "core"; >> }; >> >> + cryptobam: dma-controller@704000 { >> + compatible = "qcom,bam-v1.7.0"; >> + reg = <0x00704000 0x20000>; >> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; >> + #dma-cells = <1>; >> + qcom,ee = <1>; >> + qcom,controlled-remotely; >> + }; >> + >> + crypto: crypto@73a000 { >> + compatible = "qcom,crypto-v5.1"; > This compatible is deprecated. Take a look at the bindings - I think you > miss bindings for your SoC, which you should then use here. Okay, will address in next spin. Thanks, Anusha > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-05-15 7:29 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-05-12 9:01 [PATCH 0/2]] Enable crypto for ipq9574 Anusha Rao 2023-05-12 9:01 ` [PATCH 1/2] clk: qcom: gcc-ipq9574: Enable crypto clocks Anusha Rao 2023-05-12 9:20 ` Krzysztof Kozlowski 2023-05-15 7:12 ` Anusha Canchi 2023-05-12 9:01 ` [PATCH 2/2] arm64: dts: qcom: ipq9574: Enable crypto nodes Anusha Rao 2023-05-12 9:22 ` Krzysztof Kozlowski 2023-05-15 7:28 ` Anusha Canchi
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