From: Roger Quadros <rogerq@kernel.org>
To: Swapnil Jakhade <sjakhade@cadence.com>,
vkoul@kernel.org, kishon@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Cc: mparab@cadence.com, s-vadapalli@ti.com
Subject: Re: [PATCH v3 4/5] dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200
Date: Fri, 22 Dec 2023 12:11:24 +0200 [thread overview]
Message-ID: <84898c6f-8325-41f7-8186-c01a3cd830e4@kernel.org> (raw)
In-Reply-To: <20231221162051.2131202-5-sjakhade@cadence.com>
On 21/12/2023 18:20, Swapnil Jakhade wrote:
> TI J7200 uses Torrent SD0805 version which is a special version derived
> from Torrent SD0801 with some differences in register configurations.
> Add a separate compatible for TI J7200 platforms.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
--
cheers,
-roger
next prev parent reply other threads:[~2023-12-22 10:11 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 16:20 [PATCH v3 0/5] PHY: Add support for dual refclk configurations in Cadence Torrent PHY driver Swapnil Jakhade
2023-12-21 16:20 ` [PATCH v3 1/5] dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1 Swapnil Jakhade
2023-12-21 20:35 ` Krzysztof Kozlowski
2023-12-22 10:10 ` Roger Quadros
2023-12-21 16:20 ` [PATCH v3 2/5] phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration Swapnil Jakhade
2023-12-22 10:07 ` Roger Quadros
2023-12-21 16:20 ` [PATCH v3 3/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) " Swapnil Jakhade
2023-12-22 10:11 ` Roger Quadros
2023-12-21 16:20 ` [PATCH v3 4/5] dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 Swapnil Jakhade
2023-12-22 10:11 ` Roger Quadros [this message]
2023-12-21 16:20 ` [PATCH v3 5/5] phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config " Swapnil Jakhade
2023-12-22 10:11 ` Roger Quadros
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