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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f259d65dfsm24489778f8f.64.2025.02.21.10.20.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Feb 2025 10:20:20 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Philippe Simons Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/Allwinner sunXi SoC support" , "open list:ARM/Allwinner sunXi SoC support" , open list Subject: Re: [RFC PATCH 3/3] arm64: dts: allwinner: h700: Enable USB OTG Date: Fri, 21 Feb 2025 19:20:19 +0100 Message-ID: <8490202.T7Z3S40VBb@jernej-laptop> In-Reply-To: References: <20250118102207.9339-1-simons.philippe@gmail.com> <3229934.fEcJ0Lxnt5@jernej-laptop> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne petek, 21. februar 2025 ob 10:54:27 Srednjeevropski standardni =C4=8Das= je Philippe Simons napisal(a): > On Thu, Feb 20, 2025 at 9:38=E2=80=AFPM Jernej =C5=A0krabec wrote: > > > > Dne sobota, 18. januar 2025 ob 11:22:06 Srednjeevropski standardni =C4= =8Das je Philippe Simons napisal(a): > > > RG35XX have a GPIO controlled regulator for phy0 vbus, add it. > > > Enable HCI0s controllers and otg for dr_mode. > > > Add phy0 properties to descrive id_det, external vbus, and internal v= bus > > > > > > Signed-off-by: Philippe Simons > > > > This could work without previous two patches, right? >=20 > While this correctly describes the board, it currently doesn't works > as expected. > HCIs will enable the 5v on PHY and will never disable it. > Resulting in a blown regulator on the board if plugged with another host. > I managed to get this working by removing the PHY ref from the HCI, > but this is wrong. Ok, so this patch shouldn't be merged until USB patches are in. Best regards, Jernej >=20 > > > > Reviewed-by: Jernej Skrabec > > > > Best regards, > > Jernej > > > > > --- > > > .../sun50i-h700-anbernic-rg35xx-2024.dts | 25 +++++++++++++++++= =2D- > > > 1 file changed, 23 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35x= x-2024.dts b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024= =2Edts > > > index 80ccab7b5..5a6ae42de 100644 > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.= dts > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h700-anbernic-rg35xx-2024.= dts > > > @@ -175,6 +175,16 @@ reg_vcc5v: regulator-vcc5v { /* USB-C power inpu= t */ > > > regulator-min-microvolt =3D <5000000>; > > > regulator-max-microvolt =3D <5000000>; > > > }; > > > + > > > + reg_usb0_vbus: regulator-usb0-vbus { > > > + compatible =3D "regulator-fixed"; > > > + enable-active-high; > > > + gpio =3D <&pio 8 16 GPIO_ACTIVE_HIGH>; /* PI16 */ > > > + regulator-min-microvolt =3D <5000000>; > > > + regulator-max-microvolt =3D <5000000>; > > > + regulator-name =3D "usb0-vbus"; > > > + vin-supply =3D <®_boost>; > > > + }; > > > }; > > > > > > &cpu0 { > > > @@ -337,12 +347,23 @@ &uart0 { > > > status =3D "okay"; > > > }; > > > > > > -/* the AXP717 has USB type-C role switch functionality, not yet desc= ribed by the binding */ > > > +/* the AXP717 has USB type-C role switch functionality */ > > > &usbotg { > > > - dr_mode =3D "peripheral"; /* USB type-C receptable */ > > > + dr_mode =3D "otg"; /* USB type-C receptable */ > > > + status =3D "okay"; > > > +}; > > > + > > > +&ehci0 { > > > + status =3D "okay"; > > > +}; > > > + > > > +&ohci0 { > > > status =3D "okay"; > > > }; > > > > > > &usbphy { > > > + usb0_id_det-gpios =3D <&pio 8 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP= )>; /* PI4 */ > > > + usb0_vbus_power-supply =3D <&usb_power>; > > > + usb0_vbus-supply =3D <®_usb0_vbus>; > > > status =3D "okay"; > > > }; > > > > > > > > > > > >=20